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Roland Ruehl
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San Carlos, CA, US
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Patents Grants
last 30 patents
Information
Patent Grant
Model-based simulation result predictor for circuit design
Patent number
11,842,130
Issue date
Dec 12, 2023
Cadence Design Systems, Inc.
Saleha Khatun
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Information
Patent Grant
Methods, systems, and computer program products for implementing an...
Patent number
10,635,770
Issue date
Apr 28, 2020
Cadence Design Systems, Inc.
Xiaohai Wu
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Information
Patent Grant
Method, system, and computer program product for implementing routi...
Patent number
10,515,177
Issue date
Dec 24, 2019
Cadence Design Systems, Inc.
Roland Ruehl
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Information
Patent Grant
Method and system for performing incremental post layout simulation...
Patent number
10,346,573
Issue date
Jul 9, 2019
Cadence Design Systems, Inc.
Karun Sharma
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Information
Patent Grant
Method, system, and computer program product for implementing track...
Patent number
10,296,695
Issue date
May 21, 2019
Cadence Design Systems, Inc.
Yinnie Lee
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Information
Patent Grant
Methods, systems, and articles of manufacture for interactively imp...
Patent number
10,049,175
Issue date
Aug 14, 2018
Cadence Design Systems, Inc.
Jeffrey S. Salowe
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Information
Patent Grant
Methods, systems, and computer program product for implementing DRC...
Patent number
9,904,756
Issue date
Feb 27, 2018
Cadence Design Systems, Inc.
Roland Ruehl
G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information
Patent Grant
Methods, systems, and computer program product for a bottom-up elec...
Patent number
9,659,138
Issue date
May 23, 2017
Cadence Design Systems, Inc.
Giles V. Powell
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Information
Patent Grant
Methods, systems, and computer program product for implementing DRC...
Patent number
9,652,579
Issue date
May 16, 2017
Cadence Design Systems, Inc.
Alexandre Arkhipov
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Information
Patent Grant
Method, system, and computer program product for interconnecting ci...
Patent number
9,396,301
Issue date
Jul 19, 2016
Cadence Design Systems, Inc.
Yinnie Lee
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Information
Patent Grant
Method, system, and computer program product for implementing repet...
Patent number
9,372,955
Issue date
Jun 21, 2016
Cadence Design Systems, Inc.
Yinnie Lee
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Information
Patent Grant
Method and system for implementing a stream reader for EDA tools
Patent number
9,164,969
Issue date
Oct 20, 2015
Cadence Design Systems, Inc.
Udayan Anand Gumaste
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Information
Patent Grant
Methods, systems, and articles of manufacture for interactively imp...
Patent number
9,117,052
Issue date
Aug 25, 2015
Cadence Design Systems, Inc.
Jeffrey Salowe
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Information
Patent Grant
Methods, systems, and articles of manufacture for implementing inte...
Patent number
9,064,063
Issue date
Jun 23, 2015
Cadence Design Systems, Inc.
Henry Yu
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Information
Patent Grant
System and method for automated real-time design checking
Patent number
8,807,948
Issue date
Aug 19, 2014
Cadence Design Systems, Inc.
Wilbur Luo
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Information
Patent Grant
Method, system, and program product for interactive checking for do...
Patent number
8,739,095
Issue date
May 27, 2014
Cadence Design Systems, Inc.
Min Cao
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Information
Patent Grant
Methods, systems, and computer program product for implementing ele...
Patent number
8,694,943
Issue date
Apr 8, 2014
Cadence Design Systems, Inc.
Henry Yu
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Information
Patent Grant
Methods, systems, and computer program products for implementing in...
Patent number
8,645,902
Issue date
Feb 4, 2014
Cadence Design Systems, Inc.
Henry Yu
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Information
Patent Grant
Methods, systems, and articles of manufacture for implementing cons...
Patent number
8,516,404
Issue date
Aug 20, 2013
Cadence Design Systems, Inc.
Min Cao
G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information
Patent Grant
Method and apparatus for automatically fixing double patterning loo...
Patent number
8,473,874
Issue date
Jun 25, 2013
Cadence Design Systems, Inc.
Karun Sharma
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Information
Patent Grant
Method and system for parallel processing of IC design layouts
Patent number
8,448,096
Issue date
May 21, 2013
Cadence Design Systems, Inc.
Xiaojun Wang
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Information
Patent Grant
System and method for random defect yield simulation of chip with b...
Patent number
7,984,399
Issue date
Jul 19, 2011
Cadence Design Systems, Inc.
Roland Ruehl
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Information
Patent Grant
Method and system for implementing parallel processing of electroni...
Patent number
7,904,852
Issue date
Mar 8, 2011
Cadence Design Systems, Inc.
Eitan Cadouri
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Information
Patent Grant
System and method for using rules-based analysis to enhance models-...
Patent number
7,886,243
Issue date
Feb 8, 2011
Cadence Design Systems, Inc.
Udayan Gumaste
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Information
Patent Grant
Method and system for implementing parallel processing of electroni...
Patent number
7,823,095
Issue date
Oct 26, 2010
Cadence Design Systems, Inc.
Eitan Cadouri
Information
Patent Grant
System and method for layout optimization using model-based verific...
Patent number
7,725,845
Issue date
May 25, 2010
Cadence Design Systems, Inc.
David White
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Information
Patent Grant
System and method for performing verification based upon both rules...
Patent number
7,707,528
Issue date
Apr 27, 2010
Cadence Design Systems, Inc.
David White
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Information
Patent Grant
System and method for model-based scoring and yield prediction
Patent number
7,689,948
Issue date
Mar 30, 2010
Cadence Design Systems, Inc.
David White
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Information
Patent Grant
Method and system for parallel processing of IC design layouts
Patent number
7,657,856
Issue date
Feb 2, 2010
Cadence Design Systems, Inc.
Mathew Koshy
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Information
Patent Grant
Method and system for parallelizing computing operations
Patent number
7,409,656
Issue date
Aug 5, 2008
Cadence Design Systems, Inc.
Roland Ruehl
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Patents Applications
last 30 patents
Information
Patent Application
SYSTEM AND METHOD FOR AUTOMATED REAL-TIME DESIGN CHECKING
Publication number
20130086541
Publication date
Apr 4, 2013
Wilbur Luo
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Information
Patent Application
METHOD, SYSTEM, AND PROGRAM PRODUCT FOR INTERACTIVE CHECKING FOR DO...
Publication number
20110219341
Publication date
Sep 8, 2011
Cadence Design Systems, Inc.
Min CAO
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