Romain LALLEMENT

Person

Troy, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Transistor structure with N/P boundary buffer
- Patent number 11,569,132
- Issue date Jan 31, 2023
- International Business Machines Corporation
- Romain Lallement
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self aligned block masks for implantation control
- Patent number 11,177,132
- Issue date Nov 16, 2021
- International Business Machines Corporation
- Junli Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor structure with n/p boundary buffer
- Patent number 10,903,124
- Issue date Jan 26, 2021
- International Business Machines Corporation
- Romain Lallement
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Measuring and modeling material planarization performance
- Patent number 10,832,919
- Issue date Nov 10, 2020
- International Business Machines Corporation
- Romain Lallement
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Verifying planarization performance using electrical measures
- Patent number 10,642,950
- Issue date May 5, 2020
- International Business Machines Corporation
- Romain Lallement
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low undercut N-P work function metal patterning in nanosheet replac...
- Patent number 10,629,495
- Issue date Apr 21, 2020
- International Business Machines Corporation
- Indira Seshadri
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Resist multilayer film-attached substrate and patterning process
- Patent number 10,514,605
- Issue date Dec 24, 2019
- International Business Machines Corporation
- Seiichiro Tachibana
- C08 - ORGANIC MACROMOLECULAR COMPOUNDS THEIR PREPARATION OR CHEMICAL WORKING-...
Information Patent Grant
Methods of forming merged source/drain regions on integrated circui...
- Patent number 10,475,904
- Issue date Nov 12, 2019
- GLOBALFOUNDRIES Inc.
- Hiroaki Niimi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Simplified block patterning with wet strippable hardmask for high-e...
- Patent number 10,354,922
- Issue date Jul 16, 2019
- International Business Machines Corporation
- Ekmini Anuja De Silva
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low undercut N-P work function metal patterning in nanosheet replac...
- Patent number 10,276,452
- Issue date Apr 30, 2019
- International Business Machines Corporation
- Indira Seshadri
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD OF MAKING EUV MASK WITH AN ABSORBER LAYER
- Publication number 20230280644
- Publication date Sep 7, 2023
- International Business Machines Corporation
- Dario Goldfarb
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
TRANSISTOR STRUCTURE WITH N/P BOUNDARY BUFFER
- Publication number 20210118743
- Publication date Apr 22, 2021
- International Business Machines Corporation
- Romain Lallement
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF ALIGNED BLOCK MASKS FOR IMPLANTATION CONTROL
- Publication number 20210005459
- Publication date Jan 7, 2021
- International Business Machines Corporation
- Junli Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR STRUCTURE WITH N/P BOUNDARY BUFFER
- Publication number 20200350212
- Publication date Nov 5, 2020
- International Business Machines Corporation
- Romain Lallement
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PLANARIZATION DEPTH TRIGGERED BY PROCESS INTERACTION
- Publication number 20200118828
- Publication date Apr 16, 2020
- International Business Machines Corporation
- Romain Lallement
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEASURING AND MODELING MATERIAL PLANARIZATION PERFORMANCE
- Publication number 20190318935
- Publication date Oct 17, 2019
- International Business Machines Corporation
- Romain Lallement
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VERIFYING PLANARIZATION PERFORMANCE USING ELECTRICAL MEASURES
- Publication number 20190243927
- Publication date Aug 8, 2019
- International Business Machines Corporation
- Romain Lallement
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS OF FORMING MERGED SOURCE/DRAIN REGIONS ON INTEGRATED CIRCUI...
- Publication number 20190214484
- Publication date Jul 11, 2019
- GLOBALFOUNDRIES INC.
- Hiroaki Niimi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW UNDERCUT N-P WORK FUNCTION METAL PATTERNING IN NANOSHEET REPLAC...
- Publication number 20190214311
- Publication date Jul 11, 2019
- International Business Machines Corporation
- Indira Seshadri
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SIMPLIFIED BLOCK PATTERNING WITH WET STRIPPABLE HARDMASK FOR HIGH-E...
- Publication number 20190198398
- Publication date Jun 27, 2019
- International Business Machines Corporation
- Ekmini Anuja De Silva
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RESIST MULTILAYER FILM-ATTACHED SUBSTRATE AND PATTERNING PROCESS
- Publication number 20190041753
- Publication date Feb 7, 2019
- Shin-Etsu Chemical Co., Ltd.
- Seiichiro TACHIBANA
- H01 - BASIC ELECTRIC ELEMENTS

Romain LALLEMENT

Person

Patents Grantslast 30 patents

Transistor structure with N/P boundary buffer

Self aligned block masks for implantation control

Transistor structure with n/p boundary buffer

Measuring and modeling material planarization performance

Verifying planarization performance using electrical measures

Low undercut N-P work function metal patterning in nanosheet replac...

Resist multilayer film-attached substrate and patterning process

Methods of forming merged source/drain regions on integrated circui...

Simplified block patterning with wet strippable hardmask for high-e...

Low undercut N-P work function metal patterning in nanosheet replac...

Patents Applicationslast 30 patents

METHOD OF MAKING EUV MASK WITH AN ABSORBER LAYER

TRANSISTOR STRUCTURE WITH N/P BOUNDARY BUFFER

SELF ALIGNED BLOCK MASKS FOR IMPLANTATION CONTROL

TRANSISTOR STRUCTURE WITH N/P BOUNDARY BUFFER

PLANARIZATION DEPTH TRIGGERED BY PROCESS INTERACTION

MEASURING AND MODELING MATERIAL PLANARIZATION PERFORMANCE

VERIFYING PLANARIZATION PERFORMANCE USING ELECTRICAL MEASURES

METHODS OF FORMING MERGED SOURCE/DRAIN REGIONS ON INTEGRATED CIRCUI...

LOW UNDERCUT N-P WORK FUNCTION METAL PATTERNING IN NANOSHEET REPLAC...

SIMPLIFIED BLOCK PATTERNING WITH WET STRIPPABLE HARDMASK FOR HIGH-E...

RESIST MULTILAYER FILM-ATTACHED SUBSTRATE AND PATTERNING PROCESS