Ron M. Roth

Person

Ramat Gan, IL

People

Patents Grantslast 30 patents

Information Patent Grant
Coding for crossbar architecture
- Patent number 9,142,287
- Issue date Sep 22, 2015
- Hewlett-Packard Development Company, L.P.
- Erik Ordentlich
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory controller using crisscross error-correcting codes
- Patent number 9,070,436
- Issue date Jun 30, 2015
- Hewlett-Packard Development Company, L.P.
- Erik Ordentlich
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for encoding data for storage in a memory array
- Patent number 9,015,405
- Issue date Apr 21, 2015
- Hewlett-Packard Development Company, L.P.
- Erik Ordentlich
- G11 - INFORMATION STORAGE
Information Patent Grant
Antipodal-mapping-based encoders and decoders
- Patent number 8,949,693
- Issue date Feb 3, 2015
- Hewlett-Packard Development Company, L.P.
- Erik Ordentlich
- G11 - INFORMATION STORAGE
Information Patent Grant
Minimized half-select current in multi-state memories
- Patent number 8,938,575
- Issue date Jan 20, 2015
- Hewlett-Packard Development Company, L.P.
- Erik Ordentlich
- G11 - INFORMATION STORAGE
Information Patent Grant
Approximate enumerative coding method and apparatus
- Patent number 8,902,929
- Issue date Dec 2, 2014
- Hewlett-Packard Developent Company, L.P.
- Erik Ordentlich
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Efficient detection of errors in associative memory
- Patent number 8,887,026
- Issue date Nov 11, 2014
- Ben-Gurion University of the Negev
- Anat Bremler-Barr
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array including multi-state memory devices
- Patent number 8,880,782
- Issue date Nov 4, 2014
- Hewlett-Packard Development Company, L.P.
- Erik Ordentlich
- G11 - INFORMATION STORAGE
Information Patent Grant
Overwriting a memory array
- Patent number 8,537,596
- Issue date Sep 17, 2013
- Hewlett-Packard Development Company, L.P.
- Erik Ordentlich
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for encoding information for storage in an elec...
- Patent number 8,407,560
- Issue date Mar 26, 2013
- Hewlett-Packard Development Company, L.P.
- Erik Ordentlich
- G11 - INFORMATION STORAGE
Information Patent Grant
Encoding data based on weight constraints
- Patent number 8,405,530
- Issue date Mar 26, 2013
- Hewlett-Packard Development Company, L.P.
- Erik Ordentlich
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Defect-tolerant demultiplexers based on threshold logic
- Patent number 7,899,091
- Issue date Mar 1, 2011
- Hewlett-Packard Development Company, L.P.
- Ron M. Roth
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Constant-weight-code-based addressing of nanoscale and mixed micros...
- Patent number 7,489,583
- Issue date Feb 10, 2009
- Hewlett-Packard Development Company, L.P.
- Philip J. Kuekes
- G11 - INFORMATION STORAGE
Information Patent Grant
Error detection and correction in a layered, 3-dimensional storage...
- Patent number 7,206,987
- Issue date Apr 17, 2007
- Hewlett-Packard Development Company, L.P.
- Ron M. Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fault-tolerant neighborhood-disjoint address logic for solid state...
- Patent number 6,535,455
- Issue date Mar 18, 2003
- Hewlett-Packard Company
- Josh N. Hogan
- G11 - INFORMATION STORAGE
Information Patent Grant
Burst error and additional random bit error correction in a memory
- Patent number 6,532,565
- Issue date Mar 11, 2003
- Hewlett-Packard Company
- Ron M. Roth
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for efficient arithmetic in finite fields thro...
- Patent number 6,466,959
- Issue date Oct 15, 2002
- Hewlett-Packard Company
- Ian F. Blake
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of generating address configurations for solid state memory
- Patent number 6,466,512
- Issue date Oct 15, 2002
- Hewlett-Packard Company
- Josh N. Hogan
- G11 - INFORMATION STORAGE
Information Patent Grant
Fault-tolerant address logic for solid state memory
- Patent number 6,459,648
- Issue date Oct 1, 2002
- Josh N. Hogan
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for efficient arithmetic in finite fields thro...
- Patent number 6,199,087
- Issue date Mar 6, 2001
- Hewlett-Packard Company
- Ian F. Blake
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus having cascaded decoding for multiple runlengt...
- Patent number 6,188,335
- Issue date Feb 13, 2001
- Hewlett-Packard Company
- Ron M. Roth
- G11 - INFORMATION STORAGE
Information Patent Grant
Two-dimensional DC-free encoder and decoder
- Patent number 6,175,317
- Issue date Jan 16, 2001
- Hewlett-Packard Company
- Erik Ordentlich
- G11 - INFORMATION STORAGE
Information Patent Grant
Partitioning of polymorphic DNAs
- Patent number 6,074,831
- Issue date Jun 13, 2000
- Agilent Technologies, Inc.
- Zohar Yakhini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for generating runlength-limited coding with D...
- Patent number 6,002,718
- Issue date Dec 14, 1999
- Hewlett-Packard Company
- Ron M. Roth
- G11 - INFORMATION STORAGE
Information Patent Grant
Error correction method and apparatus based on two-dimensional code...
- Patent number 5,719,884
- Issue date Feb 17, 1998
- Hewlett-Packard Company
- Ron M. Roth
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
MEMORY CONTROLLER USING CRISSCROSS ERROR-CORRECTING CODES
- Publication number 20150248332
- Publication date Sep 3, 2015
- Hewlett-Packard Development Company, L.P.
- Erik Ordentlich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER USING CRISSCROSS ERROR-CORRECTING CODES
- Publication number 20140215121
- Publication date Jul 31, 2014
- Hewlett-Packard Development Company, L.P.
- Erik Ordentlich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INLINE FUSES IN PROGRAMMABLE CROSSBAR ARRAYS
- Publication number 20140211536
- Publication date Jul 31, 2014
- Hewlett-Packard Development Company, L.P.
- Erik Ordentlich
- G11 - INFORMATION STORAGE
Information Patent Application
ANTIPODAL-MAPPING-BASED ENCODERS AND DECODERS
- Publication number 20130346830
- Publication date Dec 26, 2013
- Erik Ordentlich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Minimized Half-Select Current in Multi-State Memories
- Publication number 20130262759
- Publication date Oct 3, 2013
- Erik Ordentlich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OVERWRITING A MEMORY ARRAY
- Publication number 20130100727
- Publication date Apr 25, 2013
- Erik Ordentlich
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARRAY INCLUDING MULTI-STATE MEMORY DEVICES
- Publication number 20130103888
- Publication date Apr 25, 2013
- Erik Ordentlich
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND SYSTEM FOR ENCODING DATA FOR STORAGE IN A MEMORY ARRAY
- Publication number 20130097396
- Publication date Apr 18, 2013
- Erik Ordentlich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENCODING DATA BASED ON WEIGHT CONSTRAINTS
- Publication number 20130044011
- Publication date Feb 21, 2013
- Erik Ordentlich
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CODING FOR CROSSBAR ARCHITECTURE
- Publication number 20120324140
- Publication date Dec 20, 2012
- Erik Ordentlich
- G11 - INFORMATION STORAGE
Information Patent Application
EFFICIENT DETECTION OF ERRORS IN ASSOCIATIVE MEMORY
- Publication number 20120117431
- Publication date May 10, 2012
- BEN GURION UNIVERSITY OF THE NEGEV
- Anat Bremler-Barr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPROXIMATE ENUMERATIVE CODING METHOD AND APPARATUS
- Publication number 20120087381
- Publication date Apr 12, 2012
- HEWLETT-PACKARD COMPANY
- Erik Ordentlich
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEMS AND METHODS FOR ENCODING INFORMATION FOR STORAGE IN AN ELEC...
- Publication number 20120017136
- Publication date Jan 19, 2012
- Erik Ordentlich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR DETECTION AND CORRECTION OF PHASED-BURST ERRO...
- Publication number 20100299575
- Publication date Nov 25, 2010
- Hewlett-Packard Development Company, L.P.
- Ron M. Roth
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Defect-tolerant demultiplexers based on threshold logic
- Publication number 20100091662
- Publication date Apr 15, 2010
- Ron M. Roth
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Constant-weight-code-based addressing of nanoscale and mixed micros...
- Publication number 20070053378
- Publication date Mar 8, 2007
- Philip J. Kuekes
- G11 - INFORMATION STORAGE
Information Patent Application
Error detection and correction in a layered, 3-dimensional storage...
- Publication number 20040221220
- Publication date Nov 4, 2004
- Ron M. Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for efficient arithmetic in finite fields thro...
- Publication number 20010007111
- Publication date Jul 5, 2001
- Ian F. Blake
- G06 - COMPUTING CALCULATING COUNTING

Ron M. Roth

Person

Patents Grantslast 30 patents

Coding for crossbar architecture

Memory controller using crisscross error-correcting codes

Method and system for encoding data for storage in a memory array

Antipodal-mapping-based encoders and decoders

Minimized half-select current in multi-state memories

Approximate enumerative coding method and apparatus

Efficient detection of errors in associative memory

Memory array including multi-state memory devices

Overwriting a memory array

Systems and methods for encoding information for storage in an elec...

Encoding data based on weight constraints

Defect-tolerant demultiplexers based on threshold logic

Constant-weight-code-based addressing of nanoscale and mixed micros...

Error detection and correction in a layered, 3-dimensional storage...

Fault-tolerant neighborhood-disjoint address logic for solid state...

Burst error and additional random bit error correction in a memory

Apparatus and method for efficient arithmetic in finite fields thro...

Method of generating address configurations for solid state memory

Fault-tolerant address logic for solid state memory

Apparatus and method for efficient arithmetic in finite fields thro...

Method and apparatus having cascaded decoding for multiple runlengt...

Two-dimensional DC-free encoder and decoder

Partitioning of polymorphic DNAs

Method and apparatus for generating runlength-limited coding with D...

Error correction method and apparatus based on two-dimensional code...

Patents Applicationslast 30 patents

MEMORY CONTROLLER USING CRISSCROSS ERROR-CORRECTING CODES

MEMORY CONTROLLER USING CRISSCROSS ERROR-CORRECTING CODES

INLINE FUSES IN PROGRAMMABLE CROSSBAR ARRAYS

ANTIPODAL-MAPPING-BASED ENCODERS AND DECODERS

Minimized Half-Select Current in Multi-State Memories

OVERWRITING A MEMORY ARRAY

MEMORY ARRAY INCLUDING MULTI-STATE MEMORY DEVICES

METHOD AND SYSTEM FOR ENCODING DATA FOR STORAGE IN A MEMORY ARRAY

ENCODING DATA BASED ON WEIGHT CONSTRAINTS

CODING FOR CROSSBAR ARCHITECTURE

EFFICIENT DETECTION OF ERRORS IN ASSOCIATIVE MEMORY

APPROXIMATE ENUMERATIVE CODING METHOD AND APPARATUS

SYSTEMS AND METHODS FOR ENCODING INFORMATION FOR STORAGE IN AN ELEC...

METHOD AND SYSTEM FOR DETECTION AND CORRECTION OF PHASED-BURST ERRO...

Defect-tolerant demultiplexers based on threshold logic

Constant-weight-code-based addressing of nanoscale and mixed micros...

Error detection and correction in a layered, 3-dimensional storage...

Apparatus and method for efficient arithmetic in finite fields thro...