Ronak Singhal

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatuses and methods for a processor architecture
- Patent number 12,130,740
- Issue date Oct 29, 2024
- Intel Corporation
- Jason W. Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packed data element predication processors, methods, systems, and i...
- Patent number 12,039,336
- Issue date Jul 16, 2024
- Intel Corporation
- Bret L. Toll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packed data element predication processors, methods, systems, and i...
- Patent number 11,442,734
- Issue date Sep 13, 2022
- Intel Corporation
- Bret L. Toll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for a processor architecture
- Patent number 11,294,809
- Issue date Apr 5, 2022
- Intel Corporation
- Jason W. Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Monitoring the operation of a processor
- Patent number 11,048,588
- Issue date Jun 29, 2021
- Intel Corporation
- Gilbert Neiger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packed data element predication processors, methods, systems, and i...
- Patent number 10,963,257
- Issue date Mar 30, 2021
- Intel Corporation
- Bret L. Toll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Criticality based port scheduling
- Patent number 10,719,355
- Issue date Jul 21, 2020
- Intel Corporation
- Pooja Roy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Monitoring the operation of a processor
- Patent number 10,599,547
- Issue date Mar 24, 2020
- Intel Corporation
- Gilbert Neiger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Misprediction-triggered local history-based branch prediction
- Patent number 10,579,414
- Issue date Mar 3, 2020
- Intel Corporation
- Niranjan K. Soundararajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient hardware-based extraction of program instructions for cri...
- Patent number 10,496,413
- Issue date Dec 3, 2019
- Intel Corporation
- Jayesh Gaur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packed data element predication processors, methods, systems, and i...
- Patent number 10,430,193
- Issue date Oct 1, 2019
- Intel Corporation
- Bret L. Toll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processors, methods, and systems to access a set of registers as ei...
- Patent number 10,228,941
- Issue date Mar 12, 2019
- Intel Corporation
- Bret L. Toll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple register memory access instructions, processors, methods,...
- Patent number 10,170,165
- Issue date Jan 1, 2019
- Intel Corporation
- Glenn Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple register memory access instructions, processors, methods,...
- Patent number 10,163,468
- Issue date Dec 25, 2018
- Intel Corporation
- Glenn Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple register memory access instructions, processors, methods,...
- Patent number 10,153,011
- Issue date Dec 11, 2018
- Intel Corporation
- Glenn Hinton
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple register memory access instructions, processors, methods,...
- Patent number 10,153,012
- Issue date Dec 11, 2018
- Intel Corporation
- Glenn Hinton
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple register memory access instructions, processors, methods,...
- Patent number 10,141,033
- Issue date Nov 27, 2018
- Intel Corporation
- Glenn Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple register memory access instructions, processors, methods,...
- Patent number 10,102,888
- Issue date Oct 16, 2018
- Intel Corporation
- Glenn Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache allocation with code and data prioritization
- Patent number 10,089,229
- Issue date Oct 2, 2018
- Intel Corporation
- Andrew J. Herdrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packed data element predication processors, methods, systems, and i...
- Patent number 9,990,202
- Issue date Jun 5, 2018
- Intel Corporation
- Bret L. Toll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Monitoring the operation of a processor
- Patent number 9,858,167
- Issue date Jan 2, 2018
- Intel Corporation
- Gilbert Neiger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple register memory access instructions, processors, methods,...
- Patent number 9,786,338
- Issue date Oct 10, 2017
- Intel Corporation
- Glenn Hinton
- G11 - INFORMATION STORAGE
Information Patent Grant
Controlling non-redundant execution in a redundant multithreading (...
- Patent number 9,594,648
- Issue date Mar 14, 2017
- Intel Corporation
- Glenn J. Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache allocation with code and data prioritization
- Patent number 9,563,564
- Issue date Feb 7, 2017
- Intel Corporation
- Andrew J. Herdrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic for a cache prefetcher and dataless fill buffer
- Patent number 9,558,127
- Issue date Jan 31, 2017
- Intel Corporation
- Stanislav Shwartsman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple register memory access instructions, processors, methods,...
- Patent number 9,424,034
- Issue date Aug 23, 2016
- Intel Corporation
- Glenn Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
SIMD processor with programmable counters externally configured to...
- Patent number 9,092,214
- Issue date Jul 28, 2015
- Intel Corporation
- Laura A. Knauth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Obtaining data for redundant multithreading (RMT) execution
- Patent number 9,081,688
- Issue date Jul 14, 2015
- Intel Corporation
- Glenn J. Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Redundant multithreading processor
- Patent number 8,793,689
- Issue date Jul 29, 2014
- Intel Corporation
- Glenn J. Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronizing recency information in an inclusive cache hierarchy
- Patent number 7,757,045
- Issue date Jul 13, 2010
- Intel Corporation
- Christopher J. Shannon
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DE-PRIORITIZING SPECULATIVE CODE LINES IN ON-CHIP CACHES
- Publication number 20230185718
- Publication date Jun 15, 2023
- Intel Corporation
- Anant Vithal Nori
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PACKED DATA ELEMENT PREDICATION PROCESSORS, METHODS, SYSTEMS, AND I...
- Publication number 20230108016
- Publication date Apr 6, 2023
- Intel Corporation
- Bret L. TOLL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR A PROCESSOR ARCHITECTURE
- Publication number 20220237123
- Publication date Jul 28, 2022
- Intel Corporation
- Jason W. Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PACKED DATA ELEMENT PREDICATION PROCESSORS, METHODS, SYSTEMS, AND I...
- Publication number 20210216325
- Publication date Jul 15, 2021
- Intel Corporation
- Bret L. TOLL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MONITORING THE OPERATION OF A PROCESSOR
- Publication number 20200257609
- Publication date Aug 13, 2020
- Intel Corporation
- Gilbert Neiger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PACKED DATA ELEMENT PREDICATION PROCESSORS, METHODS, SYSTEMS, AND I...
- Publication number 20200026518
- Publication date Jan 23, 2020
- Intel Corporation
- Bret L. TOLL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CRITICALITY BASED PORT SCHEDULING
- Publication number 20190243684
- Publication date Aug 8, 2019
- Intel Corporation
- Pooja Roy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR A PROCESSOR ARCHITECTURE
- Publication number 20190012266
- Publication date Jan 10, 2019
- Intel Corporation
- Jason W. Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR BRANCH PREDICTION UTILIZING PRIMARY AND SE...
- Publication number 20180349144
- Publication date Dec 6, 2018
- Intel Corporation
- Rahul Pal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PACKED DATA ELEMENT PREDICATION PROCESSORS, METHODS, SYSTEMS, AND I...
- Publication number 20180293074
- Publication date Oct 11, 2018
- Intel Corporation
- Bret L. TOLL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MISPREDICTION-TRIGGERED LOCAL HISTORY-BASED BRANCH PREDICTION
- Publication number 20180285115
- Publication date Oct 4, 2018
- Intel Corporation
- Niranjan K. Soundararajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT HARDWARE-BASED EXTRACTION OF PROGRAM INSTRUCTIONS FOR CRI...
- Publication number 20180232235
- Publication date Aug 16, 2018
- Intel Corporation
- Jayesh Gaur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR A PROCESSOR ARCHITECTURE
- Publication number 20180165199
- Publication date Jun 14, 2018
- Intel Corporation
- Jason W. Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MONITORING THE OPERATION OF A PROCESSOR
- Publication number 20180157575
- Publication date Jun 7, 2018
- Intel Corporation
- Gilbert Neiger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE REGISTER MEMORY ACCESS INSTRUCTIONS, PROCESSORS, METHODS,...
- Publication number 20180122431
- Publication date May 3, 2018
- lntel Corporation
- Glenn Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE REGISTER MEMORY ACCESS INSTRUCTIONS, PROCESSORS, METHODS,...
- Publication number 20180122433
- Publication date May 3, 2018
- lntel Corporation
- Glenn Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE REGISTER MEMORY ACCESS INSTRUCTIONS, PROCESSORS, METHODS,...
- Publication number 20180122432
- Publication date May 3, 2018
- lntel Corporation
- Glenn Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE REGISTER MEMORY ACCESS INSTRUCTIONS, PROCESSORS, METHODS,...
- Publication number 20180122429
- Publication date May 3, 2018
- lntel Corporation
- Glenn Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE REGISTER MEMORY ACCESS INSTRUCTIONS, PROCESSORS, METHODS,...
- Publication number 20180122430
- Publication date May 3, 2018
- lntel Corporation
- Glenn Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE REGISTER MEMORY ACCESS INSTRUCTIONS, PROCESSORS, METHODS,...
- Publication number 20180033468
- Publication date Feb 1, 2018
- lntel Corporation
- Glenn Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE ALLOCATION WITH CODE AND DATA PRIORITIZATION
- Publication number 20170192887
- Publication date Jul 6, 2017
- Intel Corporation
- ANDREW J. HERDRICH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MONITORING THE OPERATION OF A PROCESSOR
- Publication number 20170177460
- Publication date Jun 22, 2017
- Gilbert Neiger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE REGISTER MEMORY ACCESS INSTRUCTIONS, PROCESSORS, METHODS,...
- Publication number 20160358636
- Publication date Dec 8, 2016
- lntel Corporation
- Glenn Hinton
- G11 - INFORMATION STORAGE
Information Patent Application
CACHE ALLOCATION WITH CODE AND DATA PRIORITIZATION
- Publication number 20160299849
- Publication date Oct 13, 2016
- Intel Corporation
- ANDREW J. HERDRICH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION AND LOGIC FOR A CACHE PREFETCHER AND DATALESS FILL BUFFER
- Publication number 20160070651
- Publication date Mar 10, 2016
- Intel Corporation
- Stanislav Shwartsman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable Counters for Counting Floating-Point Operations in SIM...
- Publication number 20160026464
- Publication date Jan 28, 2016
- Intel Corporation
- Laura A. Knauth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPCODE TRAPPING
- Publication number 20150186140
- Publication date Jul 2, 2015
- Bret L. Toll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSORS, METHODS, AND SYSTEMS TO ACCESS A SET OF REGISTERS AS EI...
- Publication number 20150006865
- Publication date Jan 1, 2015
- Intel Corporation
- Bret L. TOLL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE REGISTER MEMORY ACCESS INSTRUCTIONS, PROCESSORS, METHODS,...
- Publication number 20150006848
- Publication date Jan 1, 2015
- Intel Corporation
- Glenn Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PACKED DATA ELEMENT PREDICATION PROCESSORS, METHODS, SYSTEMS, AND I...
- Publication number 20150006858
- Publication date Jan 1, 2015
- Intel Corporation
- BRET L. TOLL
- G06 - COMPUTING CALCULATING COUNTING

Ronak Singhal

Person

Patents Grantslast 30 patents

Apparatuses and methods for a processor architecture

Packed data element predication processors, methods, systems, and i...

Packed data element predication processors, methods, systems, and i...

Apparatuses and methods for a processor architecture

Monitoring the operation of a processor

Packed data element predication processors, methods, systems, and i...

Criticality based port scheduling

Monitoring the operation of a processor

Misprediction-triggered local history-based branch prediction

Efficient hardware-based extraction of program instructions for cri...

Packed data element predication processors, methods, systems, and i...

Processors, methods, and systems to access a set of registers as ei...

Multiple register memory access instructions, processors, methods,...

Multiple register memory access instructions, processors, methods,...

Multiple register memory access instructions, processors, methods,...

Multiple register memory access instructions, processors, methods,...

Multiple register memory access instructions, processors, methods,...

Multiple register memory access instructions, processors, methods,...

Cache allocation with code and data prioritization

Packed data element predication processors, methods, systems, and i...

Monitoring the operation of a processor

Multiple register memory access instructions, processors, methods,...

Controlling non-redundant execution in a redundant multithreading (...

Cache allocation with code and data prioritization

Instruction and logic for a cache prefetcher and dataless fill buffer

Multiple register memory access instructions, processors, methods,...

SIMD processor with programmable counters externally configured to...

Obtaining data for redundant multithreading (RMT) execution

Redundant multithreading processor

Synchronizing recency information in an inclusive cache hierarchy

Patents Applicationslast 30 patents

DE-PRIORITIZING SPECULATIVE CODE LINES IN ON-CHIP CACHES

PACKED DATA ELEMENT PREDICATION PROCESSORS, METHODS, SYSTEMS, AND I...

APPARATUSES AND METHODS FOR A PROCESSOR ARCHITECTURE

PACKED DATA ELEMENT PREDICATION PROCESSORS, METHODS, SYSTEMS, AND I...

MONITORING THE OPERATION OF A PROCESSOR

PACKED DATA ELEMENT PREDICATION PROCESSORS, METHODS, SYSTEMS, AND I...

CRITICALITY BASED PORT SCHEDULING

APPARATUSES AND METHODS FOR A PROCESSOR ARCHITECTURE

METHOD AND APPARATUS FOR BRANCH PREDICTION UTILIZING PRIMARY AND SE...

PACKED DATA ELEMENT PREDICATION PROCESSORS, METHODS, SYSTEMS, AND I...

MISPREDICTION-TRIGGERED LOCAL HISTORY-BASED BRANCH PREDICTION

EFFICIENT HARDWARE-BASED EXTRACTION OF PROGRAM INSTRUCTIONS FOR CRI...

APPARATUSES AND METHODS FOR A PROCESSOR ARCHITECTURE

MONITORING THE OPERATION OF A PROCESSOR

MULTIPLE REGISTER MEMORY ACCESS INSTRUCTIONS, PROCESSORS, METHODS,...

MULTIPLE REGISTER MEMORY ACCESS INSTRUCTIONS, PROCESSORS, METHODS,...

MULTIPLE REGISTER MEMORY ACCESS INSTRUCTIONS, PROCESSORS, METHODS,...

MULTIPLE REGISTER MEMORY ACCESS INSTRUCTIONS, PROCESSORS, METHODS,...

MULTIPLE REGISTER MEMORY ACCESS INSTRUCTIONS, PROCESSORS, METHODS,...

MULTIPLE REGISTER MEMORY ACCESS INSTRUCTIONS, PROCESSORS, METHODS,...

CACHE ALLOCATION WITH CODE AND DATA PRIORITIZATION

MONITORING THE OPERATION OF A PROCESSOR

MULTIPLE REGISTER MEMORY ACCESS INSTRUCTIONS, PROCESSORS, METHODS,...

CACHE ALLOCATION WITH CODE AND DATA PRIORITIZATION

INSTRUCTION AND LOGIC FOR A CACHE PREFETCHER AND DATALESS FILL BUFFER

Programmable Counters for Counting Floating-Point Operations in SIM...

OPCODE TRAPPING

PROCESSORS, METHODS, AND SYSTEMS TO ACCESS A SET OF REGISTERS AS EI...

MULTIPLE REGISTER MEMORY ACCESS INSTRUCTIONS, PROCESSORS, METHODS,...

PACKED DATA ELEMENT PREDICATION PROCESSORS, METHODS, SYSTEMS, AND I...