Ronald K. Sampson

Person

Langrangeville, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Device and method for alignment of vertically stacked wafers and die
- Patent number 11,205,621
- Issue date Dec 21, 2021
- STMicroelectronics, Inc.
- John H. Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device and method for alignment of vertically stacked wafers and die
- Patent number 10,615,125
- Issue date Apr 7, 2020
- STMicroelectronics, Inc.
- John H. Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FinFET device having a partially dielectric isolated fin structure
- Patent number 10,199,392
- Issue date Feb 5, 2019
- STMicroelectronics, Inc.
- Ronald K. Sampson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device and method for alignment of vertically stacked wafers and die
- Patent number 9,870,999
- Issue date Jan 16, 2018
- STMicroelectronics, Inc.
- John H. Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for the formation of a finFET device with epitaxially grown...
- Patent number 9,601,381
- Issue date Mar 21, 2017
- STMicroelectronics (Crolles 2) SAS
- Nicolas Loubet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for the formation of a FinFET device with epitaxially grown...
- Patent number 9,601,382
- Issue date Mar 21, 2017
- STMicroelectronics (Crolles 2) SAS
- Stephane Monfray
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for the formation of a FinFET device having partially dielec...
- Patent number 9,385,051
- Issue date Jul 5, 2016
- STMicroelectronics, Inc.
- Ronald K. Sampson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device and method for alignment of vertically stacked wafers and die
- Patent number 9,324,660
- Issue date Apr 26, 2016
- STMicroelectronics, Inc.
- John H. Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for the formation of a FinFET device having partially dielec...
- Patent number 9,136,384
- Issue date Sep 15, 2015
- STMicroelectronics, Inc.
- Nicolas Loubet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device and method for alignment of vertically stacked wafers and die
- Patent number 8,569,899
- Issue date Oct 29, 2013
- STMicroelectronics, Inc.
- John H. Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of determining pressure to apply to wafers during a CMP
- Patent number 8,560,111
- Issue date Oct 15, 2013
- STMicroelectronics, Inc.
- John H. Zhang
- B24 - GRINDING POLISHING
Information Patent Grant
Copper interconnect structure having a graphene cap
- Patent number 8,476,765
- Issue date Jul 2, 2013
- STMicroelectronics, Inc.
- John Hongguang Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Use of acoustic spectral analysis for monitoring/control of CMP pro...
- Patent number 6,424,137
- Issue date Jul 23, 2002
- STMicroelectronics, Inc.
- Ronald Kevin Sampson
- B24 - GRINDING POLISHING
Information Patent Grant
Method of forming an integrated circuit having spacer after shallow...
- Patent number 6,087,709
- Issue date Jul 11, 2000
- STMicroelectronics, Inc.
- Todd Gandy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming an integrated circuit having spacer after shallow...
- Patent number 6,022,788
- Issue date Feb 8, 2000
- STMicroelectronics, Inc.
- Todd Gandy
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
DEVICE AND METHOD FOR ALIGNMENT OF VERTICALLY STACKED WAFERS AND DIE
- Publication number 20200203286
- Publication date Jun 25, 2020
- STMicroelectronics, Inc.
- John H. Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE AND METHOD FOR ALIGNMENT OF VERTICALLY STACKED WAFERS AND DIE
- Publication number 20180114756
- Publication date Apr 26, 2018
- STMicroelectronics, Inc.
- John H. Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR THE FORMATION OF A FINFET DEVICE HAVING A PARTIALLY DIEL...
- Publication number 20160276371
- Publication date Sep 22, 2016
- STMicroelectronics, Inc.
- Ronald K. Sampson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE AND METHOD FOR ALIGNMENT OF VERTICALLY STACKED WAFERS AND DIE
- Publication number 20160079131
- Publication date Mar 17, 2016
- STMicroelectronics, Inc.
- John H. Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR THE FORMATION OF A FINFET DEVICE WITH EPITAXIALLY GROWN...
- Publication number 20160071772
- Publication date Mar 10, 2016
- STMicroelectronics, Inc.
- Stephane Monfray
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR THE FORMATION OF A FINFET DEVICE HAVING PARTIALLY DIELEC...
- Publication number 20150348851
- Publication date Dec 3, 2015
- STMicroelectronics, Inc.
- Ronald K. Sampson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR THE FORMATION OF A FINFET DEVICE WITH EPITAXIALLY GROWN...
- Publication number 20150162433
- Publication date Jun 11, 2015
- STMicroelectronics (Crolles 2) SAS
- Nicolas Loubet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR THE FORMATION OF A FINFET DEVICE HAVING PARTIALLY DIELEC...
- Publication number 20150162434
- Publication date Jun 11, 2015
- STMicroelectronics, Inc.
- Nicolas Loubet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE AND METHOD FOR ALIGNMENT OF VERTICALLY STACKED WAFERS AND DIE
- Publication number 20140027933
- Publication date Jan 30, 2014
- STMicroelectronics, Inc.
- John H. Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COPPER INTERCONNECT STRUCTURE HAVING A GRAPHENE CAP
- Publication number 20120139114
- Publication date Jun 7, 2012
- STMicroelectronics, Inc.
- John Hongguang Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE AND METHOD FOR ALIGNMENT OF VERTICALLY STACKED WAFERS AND DIE
- Publication number 20110156284
- Publication date Jun 30, 2011
- STMicroelectronics, Inc.
- John H. Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF DETERMINING PRESSURE TO APPLY TO WAFERS DURING A CMP
- Publication number 20100167629
- Publication date Jul 1, 2010
- STMicroelectronics, Inc.
- John H. Zhang
- B24 - GRINDING POLISHING

Ronald K. Sampson

Person

Patents Grantslast 30 patents

Device and method for alignment of vertically stacked wafers and die

Device and method for alignment of vertically stacked wafers and die

FinFET device having a partially dielectric isolated fin structure

Device and method for alignment of vertically stacked wafers and die

Method for the formation of a finFET device with epitaxially grown...

Method for the formation of a FinFET device with epitaxially grown...

Method for the formation of a FinFET device having partially dielec...

Device and method for alignment of vertically stacked wafers and die

Method for the formation of a FinFET device having partially dielec...

Device and method for alignment of vertically stacked wafers and die

Method of determining pressure to apply to wafers during a CMP

Copper interconnect structure having a graphene cap

Use of acoustic spectral analysis for monitoring/control of CMP pro...

Method of forming an integrated circuit having spacer after shallow...

Method of forming an integrated circuit having spacer after shallow...

Patents Applicationslast 30 patents

DEVICE AND METHOD FOR ALIGNMENT OF VERTICALLY STACKED WAFERS AND DIE

DEVICE AND METHOD FOR ALIGNMENT OF VERTICALLY STACKED WAFERS AND DIE

METHOD FOR THE FORMATION OF A FINFET DEVICE HAVING A PARTIALLY DIEL...

DEVICE AND METHOD FOR ALIGNMENT OF VERTICALLY STACKED WAFERS AND DIE

METHOD FOR THE FORMATION OF A FINFET DEVICE WITH EPITAXIALLY GROWN...

METHOD FOR THE FORMATION OF A FINFET DEVICE HAVING PARTIALLY DIELEC...

METHOD FOR THE FORMATION OF A FINFET DEVICE WITH EPITAXIALLY GROWN...

METHOD FOR THE FORMATION OF A FINFET DEVICE HAVING PARTIALLY DIELEC...

DEVICE AND METHOD FOR ALIGNMENT OF VERTICALLY STACKED WAFERS AND DIE

COPPER INTERCONNECT STRUCTURE HAVING A GRAPHENE CAP

DEVICE AND METHOD FOR ALIGNMENT OF VERTICALLY STACKED WAFERS AND DIE

METHOD OF DETERMINING PRESSURE TO APPLY TO WAFERS DURING A CMP