Roney S. Wong

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Execution unit for processing a data stream independently and in pa...
- Patent number 6,401,194
- Issue date Jun 4, 2002
- Samsung Electronics Co., Ltd.
- Le Trong Nguyen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computational structure having multiple stages wherein each stage i...
- Patent number 6,078,941
- Issue date Jun 20, 2000
- SamSung Electronics Co., Ltd.
- Shao-Kun Jiang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Zero detect for binary difference
- Patent number 6,018,757
- Issue date Jan 25, 2000
- Samsung Electronics Company, Ltd.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calculating the average of two integer numbers rounded towards zero...
- Patent number 6,007,232
- Issue date Dec 28, 1999
- Samsung Electronics Co., Ltd.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calculating A -sign(A) in a single instruction cycle
- Patent number 5,995,994
- Issue date Nov 30, 1999
- Samsung Semiconductor, Inc.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for parallel prediction and computation of mas...
- Patent number 5,954,790
- Issue date Sep 21, 1999
- Samsung Electronics Company, Ltd.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel multiplier that supports multiple numbers with different b...
- Patent number 5,943,250
- Issue date Aug 24, 1999
- SamSung Electronics Co., Ltd.
- Chang Soo Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fused floating-point multiply-and-accumulate unit with carry correc...
- Patent number 5,928,316
- Issue date Jul 27, 1999
- Samsung Electronics Co., Ltd.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Right-shifting an integer operand and rounding a fractional interme...
- Patent number 5,930,159
- Issue date Jul 27, 1999
- SamSung Electronics Co., Ltd.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for generating an initial estimate for a float...
- Patent number 5,923,577
- Issue date Jul 13, 1999
- Samsung Electronics Company, Ltd.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calculating the average of four integer numbers rounded towards zer...
- Patent number 5,917,739
- Issue date Jun 29, 1999
- Samsung Electronics Co., Ltd.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calculating A - sign(A) in a single instruction cycle
- Patent number 5,856,936
- Issue date Jan 5, 1999
- Samsung Semiconductor, Inc.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calculating 2A+ sign(A) in a single instruction cycle
- Patent number 5,850,347
- Issue date Dec 15, 1998
- Samsung Semiconductor, Inc.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for generating an initial estimate for a float...
- Patent number 5,847,979
- Issue date Dec 8, 1998
- Samsung Electronics Company, Ltd.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arithmetic shifter that performs multiply/divide by two to the nth...
- Patent number 5,844,827
- Issue date Dec 1, 1998
- Samsung Electronics Co., Ltd.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single-instruction-multiple-data processing using multiple banks of...
- Patent number 5,838,984
- Issue date Nov 17, 1998
- SamSung Electronics Co., Ltd.
- Le Trong Nguyen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calculating the absolute difference of two integer numbers in a sin...
- Patent number 5,835,389
- Issue date Nov 10, 1998
- Samsung Electronics Company, Ltd.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calculating selected sign 3 expression in a single instruction cycle
- Patent number 5,835,394
- Issue date Nov 10, 1998
- Samsung Electronics Co., Ltd.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calculating 2A-sign(A) in a single instruction cycle
- Patent number 5,831,887
- Issue date Nov 3, 1998
- SamSung Electronics Co., Ltd.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Element-select mechanism for a vector processor
- Patent number 5,832,288
- Issue date Nov 3, 1998
- Samsung Electronics Co., Ltd.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calculating a + sign(A) in a single instruction cycle
- Patent number 5,831,886
- Issue date Nov 3, 1998
- SamSung Electronics Co., Ltd.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ternary based shifter that supports multiple data types for shift f...
- Patent number 5,822,231
- Issue date Oct 13, 1998
- Samsung Electronics Co., Ltd.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Zero detect for binary sum
- Patent number 5,798,958
- Issue date Aug 25, 1998
- Samsung Electronics Co., Ltd.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calculating the average of two integer numbers rounded away from ze...
- Patent number 5,751,617
- Issue date May 12, 1998
- Samsung Electronics Co., Ltd.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Left-shifting an integer operand and providing a clamped integer re...
- Patent number 5,745,393
- Issue date Apr 28, 1998
- Samsung Electronics Company, Ltd.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calculating the average of four integer numbers rounded away from z...
- Patent number 5,710,732
- Issue date Jan 20, 1998
- Samsung Electronics Co., Ltd.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING

Roney S. Wong

Person

Patents Grantslast 30 patents

Execution unit for processing a data stream independently and in pa...

Computational structure having multiple stages wherein each stage i...

Zero detect for binary difference

Calculating the average of two integer numbers rounded towards zero...

Calculating A -sign(A) in a single instruction cycle

Method and apparatus for parallel prediction and computation of mas...

Parallel multiplier that supports multiple numbers with different b...

Fused floating-point multiply-and-accumulate unit with carry correc...

Right-shifting an integer operand and rounding a fractional interme...

Method and apparatus for generating an initial estimate for a float...

Calculating the average of four integer numbers rounded towards zer...

Calculating A - sign(A) in a single instruction cycle

Calculating 2A+ sign(A) in a single instruction cycle

Method and apparatus for generating an initial estimate for a float...

Arithmetic shifter that performs multiply/divide by two to the nth...

Single-instruction-multiple-data processing using multiple banks of...

Calculating the absolute difference of two integer numbers in a sin...

Calculating selected sign 3 expression in a single instruction cycle

Calculating 2A-sign(A) in a single instruction cycle

Element-select mechanism for a vector processor

Calculating a + sign(A) in a single instruction cycle

Ternary based shifter that supports multiple data types for shift f...

Zero detect for binary sum

Calculating the average of two integer numbers rounded away from ze...

Left-shifting an integer operand and providing a clamped integer re...

Calculating the average of four integer numbers rounded away from z...