Ross E. Noble

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Dual interlayer dielectric stressor integration with a sacrificial...
- Patent number 8,247,850
- Issue date Aug 21, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Dharmesh Jawarani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a through silicon via (TSV)
- Patent number 8,039,386
- Issue date Oct 18, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Thuy B. Dao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a semiconductor layer
- Patent number 7,972,922
- Issue date Jul 5, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Hunter J. Martinez
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method to control uniformity/composition of metal electrodes, silic...
- Patent number 7,611,936
- Issue date Nov 3, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Leo Mathew
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having an insulating layer and method for forming
- Patent number 6,908,822
- Issue date Jun 21, 2005
- FREESCALE SEMICONDUCTOR, INC.
- Michael J. Rendon
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR FORMING A THROUGH SILICON VIA (TSV)
- Publication number 20110237073
- Publication date Sep 29, 2011
- Thuy B. Dao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A SEMICONDUCTOR LAYER
- Publication number 20100129952
- Publication date May 27, 2010
- Hunter J. Martinez
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Method to control uniformity/composition of metal electrodes, silic...
- Publication number 20080280429
- Publication date Nov 13, 2008
- Freescale Semiconductor, Inc.
- Leo Mathew
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dual interlayer dielectric stressor integration with a sacrificial...
- Publication number 20080164531
- Publication date Jul 10, 2008
- Freescale Semiconductor, Inc.
- Dharmesh Jawarani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REMOVING METAL USING AN OXIDIZING CHEMISTRY
- Publication number 20070295357
- Publication date Dec 27, 2007
- Michael Luke Lovejoy
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
Semiconductor fabrication process including source/drain recessing...
- Publication number 20060115949
- Publication date Jun 1, 2006
- Freescale Semiconductor, Inc.
- Da Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor device having an insulating layer and method for forming
- Publication number 20050056899
- Publication date Mar 17, 2005
- Michael J. Rendon
- H01 - BASIC ELECTRIC ELEMENTS

Ross E. Noble

Person

Patents Grantslast 30 patents

Dual interlayer dielectric stressor integration with a sacrificial...

Method for forming a through silicon via (TSV)

Method of forming a semiconductor layer

Method to control uniformity/composition of metal electrodes, silic...

Semiconductor device having an insulating layer and method for forming

Patents Applicationslast 30 patents

METHOD FOR FORMING A THROUGH SILICON VIA (TSV)

METHOD OF FORMING A SEMICONDUCTOR LAYER

Method to control uniformity/composition of metal electrodes, silic...

Dual interlayer dielectric stressor integration with a sacrificial...

REMOVING METAL USING AN OXIDIZING CHEMISTRY

Semiconductor fabrication process including source/drain recessing...

Semiconductor device having an insulating layer and method for forming