Ruben Molina JR.

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San Ramon, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus of core timing prediction of core logic in the...
- Patent number 8,775,995
- Issue date Jul 8, 2014
- LSI Corporation
- Ruben Salvador Molina
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and computer program for static timing analysis with delay d...
- Patent number 7,480,881
- Issue date Jan 20, 2009
- LSI Logic Corporation
- Alexander Tetelbaum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of automated repair of crosstalk violations and timing viola...
- Patent number 7,062,737
- Issue date Jun 13, 2006
- LSI Logic Corporation
- Alexander Tetelbaum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit design flow with capacitive margin
- Patent number 6,810,505
- Issue date Oct 26, 2004
- LSI Logic Corporation
- Alexander Tetelbaum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of generating an optimal clock buffer set for minimizing clo...
- Patent number 6,442,737
- Issue date Aug 27, 2002
- LSI Logic Corporation
- Alexander Tetelbaum
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND COMPUTER PROGRAM FOR STATIC TIMING ANALYSIS WITH DELAY D...
- Publication number 20080046848
- Publication date Feb 21, 2008
- Alexander Tetelbaum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus of core timing prediction
- Publication number 20070256041
- Publication date Nov 1, 2007
- LSI Logic Corporation
- Ruben Salvador Molina
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of automated repair of crosstalk violations and timing viola...
- Publication number 20060026539
- Publication date Feb 2, 2006
- Alexander Tetelbaum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Intelligent engine for protection against injected crosstalk delay
- Publication number 20040243956
- Publication date Dec 2, 2004
- Alexander Tetelbaum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated circuit design flow with capacitive margin
- Publication number 20040010761
- Publication date Jan 15, 2004
- Alexander Tetelbaum
- G06 - COMPUTING CALCULATING COUNTING