Rudi Frenzel

Person

Munich, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Low power mode for vectored data transmission
- Patent number 9,749,008
- Issue date Aug 29, 2017
- Lantiq Beteiligungs-GmbH & Co. KG
- Rudi Frenzel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multi-carrier clock transport and synchronization
- Patent number 9,001,904
- Issue date Apr 7, 2015
- Lantiq Deutschland GmbH
- Rudi Frenzel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low power state for DSL system and devices
- Patent number 8,761,284
- Issue date Jun 24, 2014
- Lantiq Deutschland GmbH
- Roland Zukunft
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Allocation of signal-to-noise ratio margin in multi-carrier systems
- Patent number 8,630,249
- Issue date Jan 14, 2014
- Lantiq Deutschland GmbH
- Umashankar Thyagarajan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low power state for DSL system and devices
- Patent number 8,320,435
- Issue date Nov 27, 2012
- Lantiq Deutschland GmbH
- Roland Zukunft
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Allocation of signal-to-noise ratio margin in multi-carrier systems
- Patent number 8,169,963
- Issue date May 1, 2012
- Lantiq Deutschland GmbH
- Umashankar Thyagarajan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Data transmission device
- Patent number 7,860,155
- Issue date Dec 28, 2010
- Lantiq Deutschland GmbH
- Rudi Frenzel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Allocation of signal-to-noise ratio margin in multi-carrier systems
- Patent number 7,801,076
- Issue date Sep 21, 2010
- Infineon Technologies AG
- Umashankar Thyagarajan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Line terminator unit for a subscriber line
- Patent number 7,352,776
- Issue date Apr 1, 2008
- Infineon Technologies, AG
- Joerg Hauptmann
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High performance architecture with shared memory
- Patent number 7,346,746
- Issue date Mar 18, 2008
- Infineon Technologies Aktiengesellschaft
- Raj Kumar Jain
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
LOW POWER STATE FOR DSL SYSTEM AND DEVICES
- Publication number 20130329816
- Publication date Dec 12, 2013
- LANTIQ DEUTSCHLAND GMBH
- Roland ZUKUNFT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Allocation of Signal-to-Noise Ratio Margin in Multi-Carrier Systems
- Publication number 20120201178
- Publication date Aug 9, 2012
- Umashankar Thyagarajan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LOW POWER MODE FOR VECTORED DATA TRANSMISSION
- Publication number 20120026926
- Publication date Feb 2, 2012
- Rudi FRENZEL
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MULTI-CARRIER CLOCK TRANSPORT AND SYNCHRONIZATION
- Publication number 20110216816
- Publication date Sep 8, 2011
- Rudi FRENZEL
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ALLOCATION OF SIGNAL-TO-NOISE RATIO MARGIN IN MULTI-CARRIER SYSTEMS
- Publication number 20100309965
- Publication date Dec 9, 2010
- LANTIQ DEUTSCHLAND GMBH
- Umashankar Thyagarajan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Low Power State for DSL System and Devices
- Publication number 20090086798
- Publication date Apr 2, 2009
- INFINEON TECHNOLOGIES AG
- Roland Zukunft
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Allocation of Signal-to-Noise Ratio margin in multi-carrier systems
- Publication number 20080285510
- Publication date Nov 20, 2008
- Umashankar Thyagarajan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Data transmission device
- Publication number 20080008232
- Publication date Jan 10, 2008
- Rudi Frenzel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Architecture with shared memory
- Publication number 20060059319
- Publication date Mar 16, 2006
- Rudi Frenzel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Architecture with shared memory
- Publication number 20050071574
- Publication date Mar 31, 2005
- Rudi Frenzel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for conducting digital real time data processing
- Publication number 20040120359
- Publication date Jun 24, 2004
- Rudi Frenzel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
High performance architecture with shared memory
- Publication number 20030204665
- Publication date Oct 30, 2003
- Raj Kumar Jain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Architecture with shared memory
- Publication number 20030088744
- Publication date May 8, 2003
- Infineon Technologies Aktiengesellschaft
- Raj Kumar Jain
- G06 - COMPUTING CALCULATING COUNTING

Rudi Frenzel

Person

Patents Grantslast 30 patents

Low power mode for vectored data transmission

Multi-carrier clock transport and synchronization

Low power state for DSL system and devices

Allocation of signal-to-noise ratio margin in multi-carrier systems

Low power state for DSL system and devices

Allocation of signal-to-noise ratio margin in multi-carrier systems

Data transmission device

Allocation of signal-to-noise ratio margin in multi-carrier systems

Line terminator unit for a subscriber line

High performance architecture with shared memory

Patents Applicationslast 30 patents

LOW POWER STATE FOR DSL SYSTEM AND DEVICES

Allocation of Signal-to-Noise Ratio Margin in Multi-Carrier Systems

LOW POWER MODE FOR VECTORED DATA TRANSMISSION

MULTI-CARRIER CLOCK TRANSPORT AND SYNCHRONIZATION

ALLOCATION OF SIGNAL-TO-NOISE RATIO MARGIN IN MULTI-CARRIER SYSTEMS

Low Power State for DSL System and Devices

Allocation of Signal-to-Noise Ratio margin in multi-carrier systems

Data transmission device

Architecture with shared memory

Architecture with shared memory

Method and system for conducting digital real time data processing

High performance architecture with shared memory

Architecture with shared memory