Rupesh Singh

Person

Ghaziabad, IN

People

Patents Grantslast 30 patents

Information Patent Grant
High throughput digital filter architecture for processing unary co...
- Patent number 12,093,193
- Issue date Sep 17, 2024
- STMICROELECTRONICS INTERNATIONAL N.V.
- Ankur Bal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High throughput parallel architecture for recursive sinusoid synthe...
- Patent number 12,086,568
- Issue date Sep 10, 2024
- STMICROELECTRONICS INTERNATIONAL N.V.
- Ankur Bal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data bridge for interfacing source synchronous datapaths with unkno...
- Patent number 11,989,148
- Issue date May 21, 2024
- STMICROELECTRONICS INTERNATIONAL N.V.
- Ankur Bal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High throughput parallel architecture for recursive sinusoid synthe...
- Patent number 11,656,848
- Issue date May 23, 2023
- STMICROELECTRONICS INTERNATIONAL N.V.
- Ankur Bal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed data weighted averaging (DWA) to binary converter circuit
- Patent number 11,563,443
- Issue date Jan 24, 2023
- STMICROELECTRONICS INTERNATIONAL N.V.
- Ankur Bal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and device for testing successive approximation register ana...
- Patent number 11,463,098
- Issue date Oct 4, 2022
- STMICROELECTRONICS INTERNATIONAL N.V.
- Ankur Bal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
First order memory-less dynamic element matching technique
- Patent number 11,417,371
- Issue date Aug 16, 2022
- STMICROELECTRONICS INTERNATIONAL N.V.
- Ankur Bal
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock and data recovery circuit
- Patent number 11,411,565
- Issue date Aug 9, 2022
- STMICROELECTRONICS INTERNATIONAL N.V.
- Rupesh Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital sinusoid generator
- Patent number 11,092,993
- Issue date Aug 17, 2021
- STMicroelectronics International N.V.
- Ankur Bal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
First order memory-less dynamic element matching technique
- Patent number 11,094,354
- Issue date Aug 17, 2021
- STMICROELECTRONICS INTERNATIONAL N.V.
- Ankur Bal
- G11 - INFORMATION STORAGE
Information Patent Grant
Sigma-delta analog-to-digital converter circuit with correction for...
- Patent number 11,043,960
- Issue date Jun 22, 2021
- STMICROELECTRONICS INTERNATIONAL N.V.
- Ankur Bal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock jitter measurement using signal-to-noise ratio degradation in...
- Patent number 10,862,503
- Issue date Dec 8, 2020
- STMicroelectronics International N.V.
- Ankur Bal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Latency buffer circuit with adaptable time shift
- Patent number 10,484,165
- Issue date Nov 19, 2019
- STMicroelectronics International N.V.
- Rupesh Singh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High speed data weighted averaging architecture
- Patent number 10,218,380
- Issue date Feb 26, 2019
- STMicroelectronics International N.V.
- Ankur Bal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High speed data weighted averaging architecture
- Patent number 10,211,850
- Issue date Feb 19, 2019
- STMicroelectronics International N.V.
- Ankur Bal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High speed data weighted averaging architecture
- Patent number 10,050,640
- Issue date Aug 14, 2018
- STMicroelectronics International N.V.
- Ankur Bal
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
LOW LATENCY RESET SYNCHRONIZER CIRCUIT
- Publication number 20240364347
- Publication date Oct 31, 2024
- STMicroelectronics International N.V.
- Rupesh SINGH
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CONTROL OF SKEW BETWEEN MULTIPLE DATA LANES
- Publication number 20240039545
- Publication date Feb 1, 2024
- STMicroelectronics International N.V.
- Rupesh Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOW OVERHEAD LOOP BACK TEST FOR HIGH SPEED TRANSMITTER
- Publication number 20230266387
- Publication date Aug 24, 2023
- STMicroelectronics International N.V.
- Rupesh SINGH
- G01 - MEASURING TESTING
Information Patent Application
HIGH THROUGHPUT PARALLEL ARCHITECTURE FOR RECURSIVE SINUSOID SYNTHE...
- Publication number 20230251829
- Publication date Aug 10, 2023
- STMicroelectronics International N.V.
- Ankur BAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW POWER FINITE IMPULSE RESPONSE FILTER
- Publication number 20230033569
- Publication date Feb 2, 2023
- STMicroelectronics International N.V.
- Ankur Bal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DATA BRIDGE FOR INTERFACING SOURCE SYNCHRONOUS DATAPATHS WITH UNKNO...
- Publication number 20220206987
- Publication date Jun 30, 2022
- STMicroelectronics International N.V.
- Ankur BAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND ARCHITECTURE FOR SERIAL LINK CHARACTERIZATION BY ARBITRA...
- Publication number 20220188203
- Publication date Jun 16, 2022
- STMicroelectronics International N.V.
- Ankur BAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH SPEED DATA WEIGHTED AVERAGING (DWA) TO BINARY CONVERTER CIRCUIT
- Publication number 20220069837
- Publication date Mar 3, 2022
- STMicroelectronics International N.V.
- Ankur BAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND DEVICE FOR TESTING SUCCESSIVE APPROXIMATION REGISTER ANA...
- Publication number 20220006467
- Publication date Jan 6, 2022
- STMicroelectronics International N.V.
- Ankur BAL
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FIRST ORDER MEMORY-LESS DYNAMIC ELEMENT MATCHING TECHNIQUE
- Publication number 20210343319
- Publication date Nov 4, 2021
- STMicroelectronics International N.V.
- Ankur BAL
- G11 - INFORMATION STORAGE
Information Patent Application
CLOCK AND DATA RECOVERY CIRCUIT
- Publication number 20210211133
- Publication date Jul 8, 2021
- STMicroelectronics International N.V.
- Rupesh SINGH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH THROUGHPUT DIGITAL FILTER ARCHITECTURE FOR PROCESSING UNARY CO...
- Publication number 20210133124
- Publication date May 6, 2021
- STMicroelectronics International N.V.
- Ankur BAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FIRST ORDER MEMORY-LESS DYNAMIC ELEMENT MATCHING TECHNIQUE
- Publication number 20210110852
- Publication date Apr 15, 2021
- STMicroelectronics International N.V.
- Ankur BAL
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HIGH THROUGHPUT PARALLEL ARCHITECTURE FOR RECURSIVE SINUSOID SYNTHE...
- Publication number 20210081174
- Publication date Mar 18, 2021
- STMicroelectronics International N.V.
- Ankur BAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER CIRCUIT WITH CORRECTION FOR...
- Publication number 20200389180
- Publication date Dec 10, 2020
- STMicroelectronics International N.V.
- Ankur Bal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CLOCK JITTER MEASUREMENT USING SIGNAL-TO-NOISE RATIO DEGRADATION IN...
- Publication number 20200186162
- Publication date Jun 11, 2020
- STMicroelectronics International N.V.
- Ankur BAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIGITAL SINUSOID GENERATOR
- Publication number 20190384347
- Publication date Dec 19, 2019
- STMicroelectronics International N.V.
- Ankur BAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LATENCY BUFFER CIRCUIT WITH ADAPTABLE TIME SHIFT
- Publication number 20190190688
- Publication date Jun 20, 2019
- STMicroelectronics International N.V.
- Rupesh Singh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Rupesh Singh

Person

Patents Grantslast 30 patents

High throughput digital filter architecture for processing unary co...

High throughput parallel architecture for recursive sinusoid synthe...

Data bridge for interfacing source synchronous datapaths with unkno...

High throughput parallel architecture for recursive sinusoid synthe...

High speed data weighted averaging (DWA) to binary converter circuit

Method and device for testing successive approximation register ana...

First order memory-less dynamic element matching technique

Clock and data recovery circuit

Digital sinusoid generator

First order memory-less dynamic element matching technique

Sigma-delta analog-to-digital converter circuit with correction for...

Clock jitter measurement using signal-to-noise ratio degradation in...

Latency buffer circuit with adaptable time shift

High speed data weighted averaging architecture

High speed data weighted averaging architecture

High speed data weighted averaging architecture

Patents Applicationslast 30 patents

LOW LATENCY RESET SYNCHRONIZER CIRCUIT

CONTROL OF SKEW BETWEEN MULTIPLE DATA LANES

LOW OVERHEAD LOOP BACK TEST FOR HIGH SPEED TRANSMITTER

HIGH THROUGHPUT PARALLEL ARCHITECTURE FOR RECURSIVE SINUSOID SYNTHE...

LOW POWER FINITE IMPULSE RESPONSE FILTER

DATA BRIDGE FOR INTERFACING SOURCE SYNCHRONOUS DATAPATHS WITH UNKNO...

METHOD AND ARCHITECTURE FOR SERIAL LINK CHARACTERIZATION BY ARBITRA...

HIGH SPEED DATA WEIGHTED AVERAGING (DWA) TO BINARY CONVERTER CIRCUIT

METHOD AND DEVICE FOR TESTING SUCCESSIVE APPROXIMATION REGISTER ANA...

FIRST ORDER MEMORY-LESS DYNAMIC ELEMENT MATCHING TECHNIQUE

CLOCK AND DATA RECOVERY CIRCUIT

HIGH THROUGHPUT DIGITAL FILTER ARCHITECTURE FOR PROCESSING UNARY CO...

FIRST ORDER MEMORY-LESS DYNAMIC ELEMENT MATCHING TECHNIQUE

HIGH THROUGHPUT PARALLEL ARCHITECTURE FOR RECURSIVE SINUSOID SYNTHE...

SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER CIRCUIT WITH CORRECTION FOR...

CLOCK JITTER MEASUREMENT USING SIGNAL-TO-NOISE RATIO DEGRADATION IN...

DIGITAL SINUSOID GENERATOR

LATENCY BUFFER CIRCUIT WITH ADAPTABLE TIME SHIFT