Russell Carlton McMullan

Person

Allen, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Embedded tungsten resistor
- Patent number 10,461,075
- Issue date Oct 29, 2019
- Texas Instruments Incorporated
- Russell Carlton McMullan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded tungsten resistor
- Patent number 9,985,018
- Issue date May 29, 2018
- Texas Instruments Incorporated
- Russell Carlton McMullan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MOS transistor structure and method of forming the structure with v...
- Patent number 9,966,373
- Issue date May 8, 2018
- Texas Instruments Incorporated
- Russell Carlton McMullan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
SRAM well-tie with an uninterrupted grated first poly and first con...
- Patent number 9,741,724
- Issue date Aug 22, 2017
- Texas Instruments Incorporated
- Anand Seshadri
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Efficient buried oxide layer interconnect scheme
- Patent number 9,589,983
- Issue date Mar 7, 2017
- Texas Instruments Incorporated
- Russell Carlton McMullan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MOS transistor structure and method of forming the structure with v...
- Patent number 9,583,609
- Issue date Feb 28, 2017
- Texas Instruments Incorporated
- Russell Carlton McMullan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Efficient buried oxide layer interconnect scheme
- Patent number 9,385,140
- Issue date Jul 5, 2016
- Texas Instruments Incorporated
- Russell Carlton McMullan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
SRAM well-tie with an uninterrupted grated first poly and first con...
- Patent number 9,209,195
- Issue date Dec 8, 2015
- Texas Instruments Incorporated
- Anand Seshadri
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded tungsten resistor
- Patent number 9,184,226
- Issue date Nov 10, 2015
- Texas Instruments Incorporated
- Russell Carlton McMullan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS process to improve SRAM yield
- Patent number 9,093,315
- Issue date Jul 28, 2015
- Texas Instruments Incorporated
- Shaofeng Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Complementary stress memorization technique layer method
- Patent number 8,962,419
- Issue date Feb 24, 2015
- Texas Instruments Incorporated
- Russell Carlton McMullan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Complementary stress memorization technique layer method
- Patent number 8,871,587
- Issue date Oct 28, 2014
- Texas Instruments Incorporated
- Russell Carlton McMullan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS process to improve SRAM yield
- Patent number 8,603,875
- Issue date Dec 10, 2013
- Texas Instruments Incorporated
- Shaofeng Yu
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
MOS TRANSISTOR STRUCTURE AND METHOD OF FORMING THE STRUCTURE WITH V...
- Publication number 20170133366
- Publication date May 11, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Russell Carlton McMullan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EFFICIENT BURIED OXIDE LAYER INTERCONNECT SCHEME
- Publication number 20160284731
- Publication date Sep 29, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Russell Carlton McMullan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED TUNGSTEN RESISTOR
- Publication number 20160071838
- Publication date Mar 10, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Russell Carlton McMullan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED TUNGSTEN RESISTOR
- Publication number 20160071839
- Publication date Mar 10, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Russell Carlton McMullan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SRAM WELL-TIE WITH AN UNINTERRUPTED GRATED FIRST POLY AND FIRST CON...
- Publication number 20160049410
- Publication date Feb 18, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Anand SESHADRI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COMPLEMENTARY STRESS MEMORIZATION TECHNIQUE LAYER METHOD
- Publication number 20150011061
- Publication date Jan 8, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Russell Carlton McMULLAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS Process To Improve SRAM Yield
- Publication number 20140346609
- Publication date Nov 27, 2014
- TEXAS INSTRUMENTS INCORPORATED
- Shaofeng Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SRAM WELL-TIE WITH AN UNINTERRUPTED GRATED FIRST POLY AND FIRST CON...
- Publication number 20140327082
- Publication date Nov 6, 2014
- TEXAS INSTRUMENTS INCORPORATED
- Anand SESHADRI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MOS Transistor Structure and Method of Forming the Structure with V...
- Publication number 20140284725
- Publication date Sep 25, 2014
- TEXAS INSTRUMENTS INCORPORATED
- Russell Carlton McMullan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED TUNGSTEN RESISTOR
- Publication number 20130207221
- Publication date Aug 15, 2013
- TEXAS INSTRUMENTS INCORPORATED
- Russell Carlton McMullan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS PROCESS TO IMPROVE SRAM YIELD
- Publication number 20120104510
- Publication date May 3, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Shaofeng Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COMPLEMENTARY STRESS MEMORIZATION TECHNIQUE LAYER METHOD
- Publication number 20100015766
- Publication date Jan 21, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Russell Carlton McMULLAN
- H01 - BASIC ELECTRIC ELEMENTS

Russell Carlton McMullan

Person

Patents Grantslast 30 patents

Embedded tungsten resistor

Embedded tungsten resistor

MOS transistor structure and method of forming the structure with v...

SRAM well-tie with an uninterrupted grated first poly and first con...

Efficient buried oxide layer interconnect scheme

MOS transistor structure and method of forming the structure with v...

Efficient buried oxide layer interconnect scheme

SRAM well-tie with an uninterrupted grated first poly and first con...

Embedded tungsten resistor

CMOS process to improve SRAM yield

Complementary stress memorization technique layer method

Complementary stress memorization technique layer method

CMOS process to improve SRAM yield

Patents Applicationslast 30 patents

MOS TRANSISTOR STRUCTURE AND METHOD OF FORMING THE STRUCTURE WITH V...

EFFICIENT BURIED OXIDE LAYER INTERCONNECT SCHEME

EMBEDDED TUNGSTEN RESISTOR

EMBEDDED TUNGSTEN RESISTOR

SRAM WELL-TIE WITH AN UNINTERRUPTED GRATED FIRST POLY AND FIRST CON...

COMPLEMENTARY STRESS MEMORIZATION TECHNIQUE LAYER METHOD

CMOS Process To Improve SRAM Yield

SRAM WELL-TIE WITH AN UNINTERRUPTED GRATED FIRST POLY AND FIRST CON...

MOS Transistor Structure and Method of Forming the Structure with V...

EMBEDDED TUNGSTEN RESISTOR

CMOS PROCESS TO IMPROVE SRAM YIELD

COMPLEMENTARY STRESS MEMORIZATION TECHNIQUE LAYER METHOD