Russell N. Shryock

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Sacramento, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Interconnect topology with staggered vias for interconnecting diffe...
- Patent number 9,936,570
- Issue date Apr 3, 2018
- Intel Corporation
- Min Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Removing ground plane resonance
- Patent number 6,861,921
- Issue date Mar 1, 2005
- Intel Corporation
- Keith E. Dow
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Cutting a ground plane to remove circuit board resonance
- Patent number 6,665,927
- Issue date Dec 23, 2003
- Intel Corporation
- Keith E. Dow
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
DIFFERENTIAL INTERCONNECT TOPOLOGY IN A SUBSTRATE WITH STAGGERED VIAS
- Publication number 20160172734
- Publication date Jun 16, 2016
- Intel Corporation
- Min Wang
- H01 - BASIC ELECTRIC ELEMENTS