Ryan A. Fitch

Person

Auburn Hills, MI, US

People

Patents Grantslast 30 patents

Information Patent Grant
Collecting diagnostic data from chips
- Patent number 9,746,516
- Issue date Aug 29, 2017
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Grant
Managing redundancy repair using boundary scans
- Patent number 9,568,549
- Issue date Feb 14, 2017
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Grant
Collecting diagnostic data from chips
- Patent number 9,372,232
- Issue date Jun 21, 2016
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Grant
Test coverage of integrated circuits with masking pattern selection
- Patent number 9,366,723
- Issue date Jun 14, 2016
- GLOBALFOUNDRIES Inc.
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Grant
Managing chip testing data
- Patent number 9,285,423
- Issue date Mar 15, 2016
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Grant
Managing redundancy repair using boundary scans
- Patent number 9,201,117
- Issue date Dec 1, 2015
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Grant
Self evaluation of system on a chip with multiple cores
- Patent number 9,188,636
- Issue date Nov 17, 2015
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Grant
Test coverage of integrated circuits with test vector input spreading
- Patent number 9,116,205
- Issue date Aug 25, 2015
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Grant
Test coverage of integrated circuits with test vector input spreading
- Patent number 9,103,879
- Issue date Aug 11, 2015
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Grant
Self evaluation of system on a chip with multiple cores
- Patent number 9,069,041
- Issue date Jun 30, 2015
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Grant
Multi-core processor comparison encoding
- Patent number 9,032,256
- Issue date May 12, 2015
- International Business Machines Corporation
- Steven M. Douskey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic built-in self-test system
- Patent number 9,003,244
- Issue date Apr 7, 2015
- International Business Machines Corporation
- Steven M. Douskey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic built-in self-test system
- Patent number 8,898,530
- Issue date Nov 25, 2014
- International Business Machines Corporation
- Steven M. Douskey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test coverage of integrated circuits with masking pattern selection
- Patent number 8,856,720
- Issue date Oct 7, 2014
- International Business Machines Corporation
- Steven M. Douskey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementing enhanced pseudo random pattern generators with hierarc...
- Patent number 8,762,803
- Issue date Jun 24, 2014
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Grant
Test coverage of integrated circuits with masking pattern selection
- Patent number 8,667,431
- Issue date Mar 4, 2014
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Grant
Iimplementing enhanced aperture function calibration for logic buil...
- Patent number 8,627,162
- Issue date Jan 7, 2014
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Grant
Dynamic scan
- Patent number 8,516,318
- Issue date Aug 20, 2013
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Grant
Implementing switching factor reduction in LBIST
- Patent number 8,407,542
- Issue date Mar 26, 2013
- International Business Machines Corporation
- Steven Michael Douskey
- G01 - MEASURING TESTING
Information Patent Grant
Self-test design methodology and technique for root-gated clocking...
- Patent number 7,830,195
- Issue date Nov 9, 2010
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
COLLECTING DIAGNOSTIC DATA FROM CHIPS
- Publication number 20160238656
- Publication date Aug 18, 2016
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Application
MANAGING REDUNDANCY REPAIR USING BOUNDARY SCANS
- Publication number 20150346279
- Publication date Dec 3, 2015
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Application
COLLECTING DIAGNOSTIC DATA FROM CHIPS
- Publication number 20150168491
- Publication date Jun 18, 2015
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Application
MANAGING CHIP TESTING DATA
- Publication number 20150168490
- Publication date Jun 18, 2015
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Application
DYNAMIC BUILT-IN SELF-TEST SYSTEM
- Publication number 20150039957
- Publication date Feb 5, 2015
- International Business Machines Corporation
- Steven M. Douskey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING REDUNDANCY REPAIR USING BOUNDARY SCANS
- Publication number 20140331097
- Publication date Nov 6, 2014
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Application
TEST COVERAGE OF INTEGRATED CIRCUITS WITH MASKING PATTERN SELECTION
- Publication number 20140325298
- Publication date Oct 30, 2014
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Application
MULTI-CORE PROCESSOR COMPARISON ENCODING
- Publication number 20140201575
- Publication date Jul 17, 2014
- International Business Machines Corporation
- Steven M. Douskey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEST COVERAGE OF INTEGRATED CIRCUITS WITH MASKING PATTERN SELECTION
- Publication number 20140189612
- Publication date Jul 3, 2014
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Application
SELF EVALUATION OF SYSTEM ON A CHIP WITH MULTIPLE CORES
- Publication number 20140157073
- Publication date Jun 5, 2014
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Application
SELF EVALUATION OF SYSTEM ON A CHIP WITH MULTIPLE CORES
- Publication number 20140157072
- Publication date Jun 5, 2014
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Application
TEST COVERAGE OF INTEGRATED CIRCUITS WITH TEST VECTOR INPUT SPREADING
- Publication number 20140089751
- Publication date Mar 27, 2014
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Application
TEST COVERAGE OF INTEGRATED CIRCUITS WITH TEST VECTOR INPUT SPREADING
- Publication number 20140089750
- Publication date Mar 27, 2014
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Application
IMPLEMENTING ENHANCED PSEUDO RANDOM PATTERN GENERATORS WITH HIERARC...
- Publication number 20130191695
- Publication date Jul 25, 2013
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Application
IIMPLEMENTING ENHANCED APERTURE FUNCTION CALIBRATION FOR LOGIC BUIL...
- Publication number 20130151918
- Publication date Jun 13, 2013
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Application
Dynamic Scan
- Publication number 20120159273
- Publication date Jun 21, 2012
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Application
IMPLEMENTING SWITCHING FACTOR REDUCTION IN LBIST
- Publication number 20120030533
- Publication date Feb 2, 2012
- International Business Machines Corporation
- Steven Michael Douskey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELF-TEST DESIGN METHODOLOGY AND TECHNIQUE FOR ROOT-GATED CLOCKING...
- Publication number 20100231281
- Publication date Sep 16, 2010
- International Business Machines Corporation
- Steven M. Douskey
- G06 - COMPUTING CALCULATING COUNTING

Ryan A. Fitch

Person

Patents Grantslast 30 patents

Collecting diagnostic data from chips

Managing redundancy repair using boundary scans

Collecting diagnostic data from chips

Test coverage of integrated circuits with masking pattern selection

Managing chip testing data

Managing redundancy repair using boundary scans

Self evaluation of system on a chip with multiple cores

Test coverage of integrated circuits with test vector input spreading

Test coverage of integrated circuits with test vector input spreading

Self evaluation of system on a chip with multiple cores

Multi-core processor comparison encoding

Dynamic built-in self-test system

Dynamic built-in self-test system

Test coverage of integrated circuits with masking pattern selection

Implementing enhanced pseudo random pattern generators with hierarc...

Test coverage of integrated circuits with masking pattern selection

Iimplementing enhanced aperture function calibration for logic buil...

Dynamic scan

Implementing switching factor reduction in LBIST

Self-test design methodology and technique for root-gated clocking...

Patents Applicationslast 30 patents

COLLECTING DIAGNOSTIC DATA FROM CHIPS

MANAGING REDUNDANCY REPAIR USING BOUNDARY SCANS

COLLECTING DIAGNOSTIC DATA FROM CHIPS

MANAGING CHIP TESTING DATA

DYNAMIC BUILT-IN SELF-TEST SYSTEM

MANAGING REDUNDANCY REPAIR USING BOUNDARY SCANS

TEST COVERAGE OF INTEGRATED CIRCUITS WITH MASKING PATTERN SELECTION

MULTI-CORE PROCESSOR COMPARISON ENCODING

TEST COVERAGE OF INTEGRATED CIRCUITS WITH MASKING PATTERN SELECTION

SELF EVALUATION OF SYSTEM ON A CHIP WITH MULTIPLE CORES

SELF EVALUATION OF SYSTEM ON A CHIP WITH MULTIPLE CORES

TEST COVERAGE OF INTEGRATED CIRCUITS WITH TEST VECTOR INPUT SPREADING

TEST COVERAGE OF INTEGRATED CIRCUITS WITH TEST VECTOR INPUT SPREADING

IMPLEMENTING ENHANCED PSEUDO RANDOM PATTERN GENERATORS WITH HIERARC...

IIMPLEMENTING ENHANCED APERTURE FUNCTION CALIBRATION FOR LOGIC BUIL...

Dynamic Scan

IMPLEMENTING SWITCHING FACTOR REDUCTION IN LBIST

SELF-TEST DESIGN METHODOLOGY AND TECHNIQUE FOR ROOT-GATED CLOCKING...