Ryan Kastner

Person

La Jolla, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Techniques for improving security of circuitry designs based on a h...
- Patent number 10,990,723
- Issue date Apr 27, 2021
- The Regents of the University of California
- Ryan Kastner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for detecting hardware trojans and unintentional...
- Patent number 10,719,631
- Issue date Jul 21, 2020
- Tortuga Logic Inc.
- Wei Hu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating hardware security logic
- Patent number 10,289,873
- Issue date May 14, 2019
- Tortuga Logic Inc.
- Jason K. Oberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system providing mutli-level security to gate level info...
- Patent number 10,083,305
- Issue date Sep 25, 2018
- The Regents of the University of California
- Ryan Kastner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and systems for detecting and isolating hardware timing chan...
- Patent number 9,305,166
- Issue date Apr 5, 2016
- The Regents of the University of California
- Ryan Kastner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Designing digital processors using a flexibility metric
- Patent number 8,812,285
- Issue date Aug 19, 2014
- The Regents of the University of California
- Ali Umut Irturk
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
TECHNIQUES FOR IMPROVING SECURITY OF CIRCUITRY DESIGNS BASED ON A H...
- Publication number 20190286763
- Publication date Sep 19, 2019
- The Regents of the University of California
- Ryan Kastner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and System for Detecting Hardware Trojans and Unintentional...
- Publication number 20180032760
- Publication date Feb 1, 2018
- Tortuga Logic Inc.
- Wei Hu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Generating Hardware Security Logic
- Publication number 20170316227
- Publication date Nov 2, 2017
- Tortuga Logic Inc.
- Jason K. Oberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM PROVIDING MUTLI-LEVEL SECURITY TO GATE LEVEL INFO...
- Publication number 20160026801
- Publication date Jan 28, 2016
- The Regents of the University of California
- Ryan Kastner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEMS FOR DETECTING AND ISOLATING HARDWARE TIMING CHAN...
- Publication number 20140259161
- Publication date Sep 11, 2014
- Ryan Kastner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Superpositional Control of Integrated Circuit Processing
- Publication number 20130117838
- Publication date May 9, 2013
- Timothy Evert LEVIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIGITAL PROCESSORS
- Publication number 20120065956
- Publication date Mar 15, 2012
- The Regents of the University of California
- Ali Umut Irturk
- G06 - COMPUTING CALCULATING COUNTING

Ryan Kastner

Person

Patents Grantslast 30 patents

Techniques for improving security of circuitry designs based on a h...

Method and system for detecting hardware trojans and unintentional...

Generating hardware security logic

Method and system providing mutli-level security to gate level info...

Method and systems for detecting and isolating hardware timing chan...

Designing digital processors using a flexibility metric

Patents Applicationslast 30 patents

TECHNIQUES FOR IMPROVING SECURITY OF CIRCUITRY DESIGNS BASED ON A H...

Method and System for Detecting Hardware Trojans and Unintentional...

Generating Hardware Security Logic

METHOD AND SYSTEM PROVIDING MUTLI-LEVEL SECURITY TO GATE LEVEL INFO...

METHOD AND SYSTEMS FOR DETECTING AND ISOLATING HARDWARE TIMING CHAN...

Superpositional Control of Integrated Circuit Processing

DIGITAL PROCESSORS