Ryan Pearce

Person

Beaverton, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Self-aligned gate endcap (SAGE) architectures with vertical sidewalls
- Patent number 12,230,714
- Issue date Feb 18, 2025
- Intel Corporation
- Ritesh K. Das
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned gate endcap (SAGE) architectures with vertical sidewalls
- Patent number 12,224,349
- Issue date Feb 11, 2025
- Intel Corporation
- Ritesh K. Das
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gap fill dielectrics for electrical isolation of transistor structu...
- Patent number 12,087,614
- Issue date Sep 10, 2024
- Intel Corporation
- Michael Makowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nitrogen assisted oxide gapfill
- Patent number 10,643,946
- Issue date May 5, 2020
- Intel Corporation
- Sudipto Naskar
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
GATE CUT PLUG WITH THIN HERMETIC LINER AND LOW-K FILL FOR REDUCED C...
- Publication number 20250220990
- Publication date Jul 3, 2025
- Intel Corporation
- Swapnadip Ghosh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECT LAYERS WITH AIR GAPS
- Publication number 20250210411
- Publication date Jun 26, 2025
- Intel Corporation
- Ananya Dutta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES HAVING METAL GATE CUT PLUG STRUCTURES
- Publication number 20250159932
- Publication date May 15, 2025
- Intel Corporation
- Chiao-Ti HUANG
Information Patent Application
SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES WITH VERTICAL SIDEWALLS
- Publication number 20250151318
- Publication date May 8, 2025
- Intel Corporation
- Ritesh K. DAS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL GATE CUT WITH REDUCED OXIDATION AND PARASITIC CAPACITANCE
- Publication number 20250113600
- Publication date Apr 3, 2025
- Intel Corporation
- Yulia Gotlib
Information Patent Application
SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES WITH VERTICAL SIDEWALLS
- Publication number 20240243202
- Publication date Jul 18, 2024
- Intel Corporation
- Ritesh K. DAS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED GATE CUT STRUCTURES
- Publication number 20230057326
- Publication date Feb 23, 2023
- Intel Corporation
- Andy Chih-Hung Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GAP FILL DIELECTRICS FOR ELECTRICAL ISOLATION OF TRANSISTOR STRUCTU...
- Publication number 20220199458
- Publication date Jun 23, 2022
- Intel Corporation
- Michael Makowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES WITH VERTICAL SIDEWALLS
- Publication number 20210351300
- Publication date Nov 11, 2021
- Intel Corporation
- Ritesh K. DAS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEAM-FREE SILICON NITRIDE GAP-FILL TECHNIQUES FOR HIGH ASPECT RATIO...
- Publication number 20200211833
- Publication date Jul 2, 2020
- Intel Corporation
- Ryan Pearce
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Nitrogen Assisted Oxide Gapfill
- Publication number 20190393151
- Publication date Dec 26, 2019
- Sudipto Naskar
- H01 - BASIC ELECTRIC ELEMENTS

Ryan Pearce

Person

Patents Grantslast 30 patents

Self-aligned gate endcap (SAGE) architectures with vertical sidewalls

Self-aligned gate endcap (SAGE) architectures with vertical sidewalls

Gap fill dielectrics for electrical isolation of transistor structu...

Nitrogen assisted oxide gapfill

Patents Applicationslast 30 patents

GATE CUT PLUG WITH THIN HERMETIC LINER AND LOW-K FILL FOR REDUCED C...

INTERCONNECT LAYERS WITH AIR GAPS

INTEGRATED CIRCUIT STRUCTURES HAVING METAL GATE CUT PLUG STRUCTURES

SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES WITH VERTICAL SIDEWALLS

METAL GATE CUT WITH REDUCED OXIDATION AND PARASITIC CAPACITANCE

SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES WITH VERTICAL SIDEWALLS

SELF-ALIGNED GATE CUT STRUCTURES

GAP FILL DIELECTRICS FOR ELECTRICAL ISOLATION OF TRANSISTOR STRUCTU...

SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES WITH VERTICAL SIDEWALLS

SEAM-FREE SILICON NITRIDE GAP-FILL TECHNIQUES FOR HIGH ASPECT RATIO...

Nitrogen Assisted Oxide Gapfill