Ryan Ryoung-Han Kim

Person

Albany, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Vertical transistor static random access memory cell
- Patent number 10,580,779
- Issue date Mar 3, 2020
- GLOBALFOUNDRIES Inc.
- Kwan-Yong Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dummy gate used as interconnection and method of making the same
- Patent number 10,283,505
- Issue date May 7, 2019
- GLOBALFOUNDRIES Inc.
- Wenhui Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of utilizing trench silicide in a gate cross-couple construct
- Patent number 10,192,792
- Issue date Jan 29, 2019
- GLOBALFOUNDRIES Inc.
- Ryan Ryoung-han Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of utilizing trench silicide in a gate cross-couple construct
- Patent number 10,103,066
- Issue date Oct 16, 2018
- GLOBALFOUNDRIES Inc.
- Ryan Ryoung-han Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device configured for avoiding electrical shorting
- Patent number 10,050,118
- Issue date Aug 14, 2018
- GLOBALFOUNDRIES Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Single and double diffusion breaks on integrated circuit products c...
- Patent number 9,865,704
- Issue date Jan 9, 2018
- GLOBALFOUNDRIES Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical channel transistor-based semiconductor memory structure
- Patent number 9,711,511
- Issue date Jul 18, 2017
- GLOBALFOUNDRIES Inc.
- Kwan-Yong Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for optical proximity correction in the design and fabricat...
- Patent number 9,651,855
- Issue date May 16, 2017
- GLOBALFOUNDRIES, INC.
- Lei Sun
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Dummy gate used as interconnection and method of making the same
- Patent number 9,595,478
- Issue date Mar 14, 2017
- GLOBALFOUNDRIES Inc.
- Wenhui Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming reduced resistance local interconnect structures...
- Patent number 9,553,028
- Issue date Jan 24, 2017
- GLOBALFOUNDRIES Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming products with FinFET semiconductor devices witho...
- Patent number 9,543,416
- Issue date Jan 10, 2017
- GLOBALFOUNDRIES Inc.
- Min Gyu Sung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate contact structure having gate contact layer
- Patent number 9,490,317
- Issue date Nov 8, 2016
- GLOBALFOUNDRIES Inc.
- Andre Labonte
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing self-aligned vias
- Patent number 9,484,258
- Issue date Nov 1, 2016
- GLOBALFOUNDRIES INC.
- Ryan Ryoung-han Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
SAV using selective SAQP/SADP
- Patent number 9,478,462
- Issue date Oct 25, 2016
- GLOBALFOUNDRIES Inc.
- Wenhui Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal segments as landing pads and local interconnects in an IC device
- Patent number 9,466,604
- Issue date Oct 11, 2016
- GLOBALFOUNDRIES Inc.
- Youngtag Woo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming features having differing pitch spacing and crit...
- Patent number 9,449,835
- Issue date Sep 20, 2016
- GLOBALFOUNDRIES Inc.
- Linus Jang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming integrated circuits and multiple critical dimens...
- Patent number 9,431,264
- Issue date Aug 30, 2016
- GLOBALFOUNDRIES, INC.
- Linus Jang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming single and double diffusion breaks on integrated...
- Patent number 9,412,616
- Issue date Aug 9, 2016
- GLOBALFOUNDRIES Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Merged source/drain and gate contacts in SRAM bitcell
- Patent number 9,406,616
- Issue date Aug 2, 2016
- GLOBALFOUNDRIES Inc.
- Youngtag Woo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of utilizing trench silicide in a gate cross-couple construct
- Patent number 9,379,027
- Issue date Jun 28, 2016
- GLOBALFOUNDRIES Inc.
- Ryan Ryoung-han Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Contact formation for semiconductor device
- Patent number 9,362,279
- Issue date Jun 7, 2016
- GLOBALFOUNDRIES Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming diffusion breaks on integrated circuit products...
- Patent number 9,362,181
- Issue date Jun 7, 2016
- GLOBALFOUNDRIES Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Buried fin contact structures on FinFET semiconductor devices
- Patent number 9,362,403
- Issue date Jun 7, 2016
- GLOBALFOUNDRIES Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices with contact structures and a gate structure...
- Patent number 9,299,781
- Issue date Mar 29, 2016
- GLOBALFOUNDRIES Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for high yield contact integration scheme
- Patent number 9,275,889
- Issue date Mar 1, 2016
- GLOBALFOUNDRIES Inc.
- Ryan Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for fabricating integrated circuits including selectively f...
- Patent number 9,209,037
- Issue date Dec 8, 2015
- GLOBALFOUNDRIES, INC.
- Jason Richard Cantone
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for fabricating integrated circuits using self-aligned quad...
- Patent number 9,209,038
- Issue date Dec 8, 2015
- GLOBALFOUNDRIES, INC.
- Jason Richard Cantone
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming stressed layers on FinFET semiconductor devices...
- Patent number 9,202,918
- Issue date Dec 1, 2015
- GLOBALFOUNDRIES Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming FinFET devices in different regions of an integr...
- Patent number 9,184,169
- Issue date Nov 10, 2015
- GLOBALFOUNDRIES Inc.
- Ryan Ryoung-Han Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming semiconductor devices using a layer of material...
- Patent number 9,171,934
- Issue date Oct 27, 2015
- GLOBALFOUNDRIES Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
VERTICAL TRANSISTOR STATIC RANDOM ACCESS MEMORY CELL
- Publication number 20190267387
- Publication date Aug 29, 2019
- GLOBALFOUNDRIES INC.
- Kwan-Yong Lim
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD, APPARATUS AND SYSTEM FOR FABRICATING SELF-ALIGNED CONTACT U...
- Publication number 20170358585
- Publication date Dec 14, 2017
- GLOBALFOUNDRIES INC.
- Kwanyong Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUMMY GATE USED AS INTERCONNECTION AND METHOD OF MAKING THE SAME
- Publication number 20170141110
- Publication date May 18, 2017
- GLOBALFOUNDRIES INC.
- Wenhui WANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SINGLE AND DOUBLE DIFFUSION BREAKS ON INTEGRATED CIRCUIT PRODUCTS C...
- Publication number 20170141211
- Publication date May 18, 2017
- GLOBALFOUNDRIES INC.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUMMY GATE USED AS INTERCONNECTION AND METHOD OF MAKING THE SAME
- Publication number 20160365288
- Publication date Dec 15, 2016
- GLOBALFOUNDRIES INC.
- Wenhui WANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE CONTACT STRUCTURE HAVING GATE CONTACT LAYER
- Publication number 20160336399
- Publication date Nov 17, 2016
- GLOBALFOUNDRIES INC.
- Andre LABONTE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF UTILIZING TRENCH SILICIDE IN A GATE CROSS-COUPLE CONSTRUCT
- Publication number 20160293496
- Publication date Oct 6, 2016
- GLOBALFOUNDRIES INC.
- Ryan Ryoung-han KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF UTILIZING TRENCH SILICIDE IN A GATE CROSS-COUPLE CONSTRUCT
- Publication number 20160293495
- Publication date Oct 6, 2016
- GLOBALFOUNDRIES INC.
- Ryan Ryoung-han KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING FEATURES HAVING DIFFERING PITCH SPACING AND CRIT...
- Publication number 20160163555
- Publication date Jun 9, 2016
- GLOBALFOUNDRIES INC.
- Linus Jang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MERGED SOURCE/DRAIN AND GATE CONTACTS IN SRAM BITCELL
- Publication number 20160163644
- Publication date Jun 9, 2016
- GLOBALFOUNDRIES INC.
- Youngtag WOO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR OPTICAL PROXIMITY CORRECTION IN THE DESIGN AND FABRICAT...
- Publication number 20160162624
- Publication date Jun 9, 2016
- GLOBALFOUNDRIES, Inc.
- Lei Sun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS OF FORMING DIFFUSION BREAKS ON INTEGRATED CIRCUIT PRODUCTS...
- Publication number 20160163604
- Publication date Jun 9, 2016
- GLOBALFOUNDRIES INC.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND APPARATUS FOR A HIGH YIELD CONTACT INTEGRATION SCHEME
- Publication number 20160141242
- Publication date May 19, 2016
- GLOBALFOUNDRIES INC.
- Ryan KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL SEGMENTS AS LANDING PADS AND LOCAL INTERCONNECTS IN AN IC DEVICE
- Publication number 20160141291
- Publication date May 19, 2016
- GLOBALFOUNDRIES INC.
- Youngtag WOO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING PRODUCTS WITH FINFET SEMICONDUCTOR DEVICES WITHO...
- Publication number 20160133726
- Publication date May 12, 2016
- GLOBALFOUNDRIES INC.
- Min Gyu Sung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF UTILIZING TRENCH SILICIDE IN A GATE CROSS-COUPLE CONSTRUCT
- Publication number 20160111341
- Publication date Apr 21, 2016
- GLOBALFOUNDRIES INC.
- Ryan Ryoung-han KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINFET SEMICONDUCTOR DEVICES WITH STRESSED LAYERS
- Publication number 20160043223
- Publication date Feb 11, 2016
- GLOBALFOUNDRIES INC.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICES WITH A LAYER OF MATERIAL HAVING A PLURALITY O...
- Publication number 20150349053
- Publication date Dec 3, 2015
- GLOBALFOUNDRIES INC.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Buried fin contact structures on FinFET semiconductor devices
- Publication number 20150340452
- Publication date Nov 26, 2015
- GLOBALFOUNDRIES INC.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL TRANSISTOR STATIC RANDOM ACCESS MEMORY CELL
- Publication number 20150318288
- Publication date Nov 5, 2015
- GLOBALFOUNDRIES INC.
- Kwan-Yong Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FABRICATING INTEGRATED CIRCUITS USING SELF-ALIGNED QUAD...
- Publication number 20150318181
- Publication date Nov 5, 2015
- GLOBALFOUNDRIES, Inc.
- Jason Richard Cantone
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE CONFIGURED FOR AVOIDING ELECTRICAL SHORTING
- Publication number 20150318345
- Publication date Nov 5, 2015
- GLOBALFOUNDRIES INC.
- Ruilong XIE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING FINFET DEVICES IN DIFFERENT REGIONS OF AN INTEGR...
- Publication number 20150294976
- Publication date Oct 15, 2015
- GLOBALFOUNDIES INC.
- Ryan Ryoung-Han Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING SEMICONDUCTOR DEVICES USING A LAYER OF MATERIAL...
- Publication number 20150279972
- Publication date Oct 1, 2015
- GLOBALFOUNDRIES INC.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICES WITH CONTACT STRUCTURES AND A GATE STRUCTURE...
- Publication number 20150279935
- Publication date Oct 1, 2015
- GLOBALFOUNDRIES INC.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING REDUCED RESISTANCE LOCAL INTERCONNECT STRUCTURES...
- Publication number 20150270176
- Publication date Sep 24, 2015
- GLOBALFOUNDRIES INC.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING SELECTIVELY F...
- Publication number 20150255299
- Publication date Sep 10, 2015
- GLOBALFOUNDRIES, Inc.
- Jason Richard Cantone
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FABRICATING INTEGRATED CIRCUITS USING SELF-ALIGNED QUAD...
- Publication number 20150170973
- Publication date Jun 18, 2015
- GLOBALFOUNDRIES, Inc.
- Ryan Ryoung Han Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CROSS COUPLING GATE USING MULITPLE PATTERNING
- Publication number 20150097249
- Publication date Apr 9, 2015
- GLOBALFOUNDRIES INC.
- Ryan KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND APPARATUS FOR HIGH YIELD CONTACT INTEGRATION SCHEME
- Publication number 20150097263
- Publication date Apr 9, 2015
- GLOBALFOUNDRIES INC.
- Ryan KIM
- H01 - BASIC ELECTRIC ELEMENTS

Ryan Ryoung-Han Kim

Person

Patents Grantslast 30 patents

Vertical transistor static random access memory cell

Dummy gate used as interconnection and method of making the same

Method of utilizing trench silicide in a gate cross-couple construct

Method of utilizing trench silicide in a gate cross-couple construct

Semiconductor device configured for avoiding electrical shorting

Single and double diffusion breaks on integrated circuit products c...

Vertical channel transistor-based semiconductor memory structure

Methods for optical proximity correction in the design and fabricat...

Dummy gate used as interconnection and method of making the same

Methods of forming reduced resistance local interconnect structures...

Methods of forming products with FinFET semiconductor devices witho...

Gate contact structure having gate contact layer

Method for producing self-aligned vias

SAV using selective SAQP/SADP

Metal segments as landing pads and local interconnects in an IC device

Methods of forming features having differing pitch spacing and crit...

Methods of forming integrated circuits and multiple critical dimens...

Methods of forming single and double diffusion breaks on integrated...

Merged source/drain and gate contacts in SRAM bitcell

Method of utilizing trench silicide in a gate cross-couple construct

Contact formation for semiconductor device

Methods of forming diffusion breaks on integrated circuit products...

Buried fin contact structures on FinFET semiconductor devices

Semiconductor devices with contact structures and a gate structure...

Method and apparatus for high yield contact integration scheme

Methods for fabricating integrated circuits including selectively f...

Methods for fabricating integrated circuits using self-aligned quad...

Methods of forming stressed layers on FinFET semiconductor devices...

Methods of forming FinFET devices in different regions of an integr...

Methods of forming semiconductor devices using a layer of material...

Patents Applicationslast 30 patents

VERTICAL TRANSISTOR STATIC RANDOM ACCESS MEMORY CELL

METHOD, APPARATUS AND SYSTEM FOR FABRICATING SELF-ALIGNED CONTACT U...

DUMMY GATE USED AS INTERCONNECTION AND METHOD OF MAKING THE SAME

SINGLE AND DOUBLE DIFFUSION BREAKS ON INTEGRATED CIRCUIT PRODUCTS C...

DUMMY GATE USED AS INTERCONNECTION AND METHOD OF MAKING THE SAME

GATE CONTACT STRUCTURE HAVING GATE CONTACT LAYER

METHOD OF UTILIZING TRENCH SILICIDE IN A GATE CROSS-COUPLE CONSTRUCT

METHOD OF UTILIZING TRENCH SILICIDE IN A GATE CROSS-COUPLE CONSTRUCT

METHODS OF FORMING FEATURES HAVING DIFFERING PITCH SPACING AND CRIT...

MERGED SOURCE/DRAIN AND GATE CONTACTS IN SRAM BITCELL

METHODS FOR OPTICAL PROXIMITY CORRECTION IN THE DESIGN AND FABRICAT...

METHODS OF FORMING DIFFUSION BREAKS ON INTEGRATED CIRCUIT PRODUCTS...

METHOD AND APPARATUS FOR A HIGH YIELD CONTACT INTEGRATION SCHEME

METAL SEGMENTS AS LANDING PADS AND LOCAL INTERCONNECTS IN AN IC DEVICE

METHODS OF FORMING PRODUCTS WITH FINFET SEMICONDUCTOR DEVICES WITHO...

METHOD OF UTILIZING TRENCH SILICIDE IN A GATE CROSS-COUPLE CONSTRUCT

FINFET SEMICONDUCTOR DEVICES WITH STRESSED LAYERS

SEMICONDUCTOR DEVICES WITH A LAYER OF MATERIAL HAVING A PLURALITY O...

Buried fin contact structures on FinFET semiconductor devices

VERTICAL TRANSISTOR STATIC RANDOM ACCESS MEMORY CELL

METHODS FOR FABRICATING INTEGRATED CIRCUITS USING SELF-ALIGNED QUAD...

SEMICONDUCTOR DEVICE CONFIGURED FOR AVOIDING ELECTRICAL SHORTING

METHODS OF FORMING FINFET DEVICES IN DIFFERENT REGIONS OF AN INTEGR...

METHODS OF FORMING SEMICONDUCTOR DEVICES USING A LAYER OF MATERIAL...

SEMICONDUCTOR DEVICES WITH CONTACT STRUCTURES AND A GATE STRUCTURE...

METHODS OF FORMING REDUCED RESISTANCE LOCAL INTERCONNECT STRUCTURES...

METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING SELECTIVELY F...

METHODS FOR FABRICATING INTEGRATED CIRCUITS USING SELF-ALIGNED QUAD...

CROSS COUPLING GATE USING MULITPLE PATTERNING

METHOD AND APPARATUS FOR HIGH YIELD CONTACT INTEGRATION SCHEME