Sabine Schoniger

Person

Hausham, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Circuit configuration for an integrated semiconductor memory with c...
- Patent number 6,535,454
- Issue date Mar 18, 2003
- Infineon Technologies AG
- Helmut Schneider
- G11 - INFORMATION STORAGE
Information Patent Grant
Layout of a sense amplifier with accelerated signal evaluation
- Patent number 6,473,324
- Issue date Oct 29, 2002
- Infineon Technologies AG
- Helmut Fischer
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory
- Patent number 6,437,410
- Issue date Aug 20, 2002
- Infineon Technologies AG
- Stefan Dietrich
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit having a command decoder
- Patent number 6,404,699
- Issue date Jun 11, 2002
- Infineon Technologies AG
- Peter Schrögmeier
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit and method for testing it
- Patent number 6,401,224
- Issue date Jun 4, 2002
- Infineon Technologies AG
- Sabine Schöniger
- G01 - MEASURING TESTING
Information Patent Grant
Integrated memory with row access control to activate and precharge...
- Patent number 6,396,755
- Issue date May 28, 2002
- Infineon Technologies AG
- Stefan Dietrich
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit having a decoder unit and an additional input of...
- Patent number 6,385,123
- Issue date May 7, 2002
- Infineon Technologies AG
- Stefan Dietrich
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and circuit configuration for read-write mode control of a s...
- Patent number 6,359,832
- Issue date Mar 19, 2002
- Infineon Technologies AG
- Stefan Dietrich
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory with a block writing function and global amplifie...
- Patent number 6,351,419
- Issue date Feb 26, 2002
- Infineon Technologies AG
- Stefan Dietrich
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory with two burst operation types
- Patent number 6,310,824
- Issue date Oct 30, 2001
- Infineon Technologies AG
- Sabine Schöniger
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory having redundant units of memory cells, and test...
- Patent number 6,285,605
- Issue date Sep 4, 2001
- Infineon Technologies AG
- Peter Schrögmeier
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory having memory cells disposed at crossover points...
- Patent number 6,256,219
- Issue date Jul 3, 2001
- Infineon Technologies AG
- Peter Schrögmeier
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory having column decoder for addressing correspondin...
- Patent number 6,188,642
- Issue date Feb 13, 2001
- Siemens Aktiengesellschaft
- Sabine Schöniger
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory having differential bit lines
- Patent number 6,144,590
- Issue date Nov 7, 2000
- Siemens Aktiengesellschaft
- Michael Markert
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory
- Patent number 6,101,141
- Issue date Aug 8, 2000
- Siemens Aktiengesellschaft
- Sabine Schoniger
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory
- Patent number 6,028,815
- Issue date Feb 22, 2000
- Siemens Aktiengesellschaft
- Sabine Schoniger
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Layout of a sense amplifier with accelerated signal evaluation
- Publication number 20010048620
- Publication date Dec 6, 2001
- Helmut Fischer
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated memory with row access control to activate and precharge...
- Publication number 20010046172
- Publication date Nov 29, 2001
- Stefan Dietrich
- G11 - INFORMATION STORAGE
Information Patent Application
Method and circuit configuration for read-write mode control of a s...
- Publication number 20010043503
- Publication date Nov 22, 2001
- Stefan Dietrich
- G11 - INFORMATION STORAGE
Information Patent Application
Memory configuration having a circuit for determining the activated...
- Publication number 20010026498
- Publication date Oct 4, 2001
- Stefan Dietrich
- G11 - INFORMATION STORAGE
Information Patent Application
Circuit configuration for an integrated semiconductor memory with c...
- Publication number 20010019139
- Publication date Sep 6, 2001
- Helmut Schneider
- G11 - INFORMATION STORAGE

Sabine Schoniger

Person

Patents Grantslast 30 patents

Circuit configuration for an integrated semiconductor memory with c...

Layout of a sense amplifier with accelerated signal evaluation

Integrated memory

Integrated circuit having a command decoder

Integrated circuit and method for testing it

Integrated memory with row access control to activate and precharge...

Integrated circuit having a decoder unit and an additional input of...

Method and circuit configuration for read-write mode control of a s...

Integrated memory with a block writing function and global amplifie...

Integrated memory with two burst operation types

Integrated memory having redundant units of memory cells, and test...

Integrated memory having memory cells disposed at crossover points...

Integrated memory having column decoder for addressing correspondin...

Semiconductor memory having differential bit lines

Integrated memory

Integrated memory

Patents Applicationslast 30 patents

Layout of a sense amplifier with accelerated signal evaluation

Integrated memory with row access control to activate and precharge...

Method and circuit configuration for read-write mode control of a s...

Memory configuration having a circuit for determining the activated...

Circuit configuration for an integrated semiconductor memory with c...