Sachin D. Dasnurkar

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Algorithm for preferred core sequencing to maximize performance and...
- Patent number 9,557,797
- Issue date Jan 31, 2017
- QUALCOMM Incorporated
- Rajat Mittal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for enhanced sleep mode tiering to optimize st...
- Patent number 9,179,406
- Issue date Nov 3, 2015
- QUALCOMM Incorporated
- Sachin D Dasnurkar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Real-time adaptive hybrid BiST solution for low-cost and low-resour...
- Patent number 8,510,073
- Issue date Aug 13, 2013
- Qualcomm, Incorporated
- Sachin D. Dasnurkar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems and methods for vector-based analog-to-digital converter se...
- Patent number 8,310,385
- Issue date Nov 13, 2012
- Qualcomm, Incorporated
- Sachin D Dasnurkar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems and methods for built in self test jitter measurement
- Patent number 8,283,933
- Issue date Oct 9, 2012
- Qualcomm, Incorporated
- Sachin D Dasnurkar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and apparatus for built in self test of analog-to-digital c...
- Patent number 8,106,801
- Issue date Jan 31, 2012
- Qualcomm, Incorporated
- Sachin D Dasnurkar
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
AUTOMATIC FAILURE IDENTIFICATION AND FAILURE PATTERN IDENTIFICATION...
- Publication number 20170242070
- Publication date Aug 24, 2017
- QUALCOMM Incorporated
- Paul Giotta
- G01 - MEASURING TESTING
Information Patent Application
DEVICE SPECIFIC THERMAL MITIGATION
- Publication number 20160313391
- Publication date Oct 27, 2016
- QUALCOMM Incorporated
- Sachin Dileep DASNURKAR
- G01 - MEASURING TESTING
Information Patent Application
THERMALLY-ADAPTIVE VOLTAGE SCALING FOR SUPPLY VOLTAGE SUPERVISOR PO...
- Publication number 20150346745
- Publication date Dec 3, 2015
- QUALCOMM Incorporated
- Sachin Dileep DASNURKAR
- G05 - CONTROLLING REGULATING
Information Patent Application
Algorithm For Preferred Core Sequencing To Maximize Performance And...
- Publication number 20150338902
- Publication date Nov 26, 2015
- QUALCOMM Incorporated
- Rajat MITTAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CORE SELECTION SCHEME
- Publication number 20150261545
- Publication date Sep 17, 2015
- QUALCOMM Incorporated
- Sachin Dileep DASNURKAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CORE SPECIFIC PROCESS VOLTAGE SCALING FOR OPTIMIZING MULTI-CORE OPE...
- Publication number 20150198988
- Publication date Jul 16, 2015
- QUALCOMM Incorporated
- Sachin Dileep DASNURKAR
- G01 - MEASURING TESTING
Information Patent Application
CORE LEVEL OPTIMIZED LOW POWER MODE
- Publication number 20150189602
- Publication date Jul 2, 2015
- QUALCOMM Incorporated
- Sachin Dileep DASNURKAR
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ALL-DIGITAL PHASE LOCKED LOOP SELF TEST SYSTEM
- Publication number 20140225635
- Publication date Aug 14, 2014
- QUALCOMM Incorporated
- Sachin D. Dasnurkar
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR ENHANCED SLEEP MODE TIERING TO OPTIMIZE ST...
- Publication number 20140107963
- Publication date Apr 17, 2014
- QUALCOMM Incorporated
- Sachin D. Dasnurkar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
REAL-TIME ADAPTIVE HYBRID BiST SOLUTION FOR LOW-COST AND LOW-RESOUR...
- Publication number 20110137604
- Publication date Jun 9, 2011
- QUALCOMM Incorporated
- Sachin D Dasnurkar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEMS AND METHODS FOR A PHASE LOCKED LOOP BUILT IN SELF TEST
- Publication number 20100293426
- Publication date Nov 18, 2010
- QUALCOMM Incorporated
- Sachin D. Dasnurkar
- G01 - MEASURING TESTING
Information Patent Application
SYSTEMS AND METHODS FOR VECTOR-BASED ANALOG-TO-DIGITAL CONVERTER SE...
- Publication number 20100289679
- Publication date Nov 18, 2010
- QUALCOMM Incorporated
- Sachin D Dasnurkar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHODS AND APPARATUS FOR BUILT IN SELF TEST OF ANALOG-TO-DIGITAL C...
- Publication number 20100253559
- Publication date Oct 7, 2010
- QUALCOMM Incorporated
- Sachin D Dasnurkar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEMS AND METHODS FOR BUILT IN SELF TEST JITTER MEASUREMENT
- Publication number 20100231233
- Publication date Sep 16, 2010
- QUALCOMM Incorporated
- Sachin D. Dasnurkar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Sachin D. Dasnurkar

Person

Patents Grantslast 30 patents

Algorithm for preferred core sequencing to maximize performance and...

Method and apparatus for enhanced sleep mode tiering to optimize st...

Real-time adaptive hybrid BiST solution for low-cost and low-resour...

Systems and methods for vector-based analog-to-digital converter se...

Systems and methods for built in self test jitter measurement

Methods and apparatus for built in self test of analog-to-digital c...

Patents Applicationslast 30 patents

AUTOMATIC FAILURE IDENTIFICATION AND FAILURE PATTERN IDENTIFICATION...

DEVICE SPECIFIC THERMAL MITIGATION

THERMALLY-ADAPTIVE VOLTAGE SCALING FOR SUPPLY VOLTAGE SUPERVISOR PO...

Algorithm For Preferred Core Sequencing To Maximize Performance And...

CORE SELECTION SCHEME

CORE SPECIFIC PROCESS VOLTAGE SCALING FOR OPTIMIZING MULTI-CORE OPE...

CORE LEVEL OPTIMIZED LOW POWER MODE

ALL-DIGITAL PHASE LOCKED LOOP SELF TEST SYSTEM

METHOD AND APPARATUS FOR ENHANCED SLEEP MODE TIERING TO OPTIMIZE ST...

REAL-TIME ADAPTIVE HYBRID BiST SOLUTION FOR LOW-COST AND LOW-RESOUR...

SYSTEMS AND METHODS FOR A PHASE LOCKED LOOP BUILT IN SELF TEST

SYSTEMS AND METHODS FOR VECTOR-BASED ANALOG-TO-DIGITAL CONVERTER SE...

METHODS AND APPARATUS FOR BUILT IN SELF TEST OF ANALOG-TO-DIGITAL C...

SYSTEMS AND METHODS FOR BUILT IN SELF TEST JITTER MEASUREMENT