Sachin Taneja

Person

Hillsboro, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Side-channel resistant multiplicatively masked encryption engine wi...
- Patent number 12,368,574
- Issue date Jul 22, 2025
- Intel Corporation
- Raghavan Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS TO REDUCE REJECTION RATE OF INTEGERS GENERATED...
- Publication number 20250219816
- Publication date Jul 3, 2025
- Intel Corporation
- Anupam GOLDER
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CONFIGURABLE VARIABLE-WORD SIZE XORSHIFT RANDOM NUMBER GENERATOR
- Publication number 20250211435
- Publication date Jun 26, 2025
- Intel Corporation
- Saurav MAJI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Modular Exponentiation Hardware Accelerator with Unconstrained Oper...
- Publication number 20250202699
- Publication date Jun 19, 2025
- Intel Corporation
- Raghavan Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ON-DIE KEY GENERATOR FOR FULLY-HOMOMORPHIC ENCRYPTION RELINEARIZATI...
- Publication number 20250112772
- Publication date Apr 3, 2025
- Intel Corporation
- Sachin TANEJA
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
FULLY HOMOMORPHIC ENCRYPTION
- Publication number 20250007687
- Publication date Jan 2, 2025
- Intel Corporation
- Sanu MATHEW
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
RECONFIGURABLE COMPUTE CIRCUITRY TO PERFORM FULLY HOMOMORPHIC ENCRY...
- Publication number 20250007688
- Publication date Jan 2, 2025
- Intel Corporation
- Raghavan KUMAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR TWIDDLE FACTOR GENERATION FOR NUMBER-THEORETIC- TRAN...
- Publication number 20250005101
- Publication date Jan 2, 2025
- Intel Corporation
- Sachin TANEJA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR CONTENTION-FREE ROUTING FOR NUMBER-THEORETIC- TRANSF...
- Publication number 20250005100
- Publication date Jan 2, 2025
- Intel Corporation
- Raghavan KUMAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR TWIDDLE FACTOR GENERATION FOR NUMBER-THEORETIC-TRANS...
- Publication number 20250005102
- Publication date Jan 2, 2025
- Intel Corporation
- Sachin TANEJA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIDE-CHANNEL RESISTANT MULTIPLICATIVELY MASKED AES ENGINE WITH ZERO...
- Publication number 20240333471
- Publication date Oct 3, 2024
- Intel Corporation
- Raghavan Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Sachin Taneja

Person

Patents Grantslast 30 patents

Side-channel resistant multiplicatively masked encryption engine wi...

Patents Applicationslast 30 patents

METHOD AND APPARATUS TO REDUCE REJECTION RATE OF INTEGERS GENERATED...

CONFIGURABLE VARIABLE-WORD SIZE XORSHIFT RANDOM NUMBER GENERATOR

Modular Exponentiation Hardware Accelerator with Unconstrained Oper...

ON-DIE KEY GENERATOR FOR FULLY-HOMOMORPHIC ENCRYPTION RELINEARIZATI...

FULLY HOMOMORPHIC ENCRYPTION

RECONFIGURABLE COMPUTE CIRCUITRY TO PERFORM FULLY HOMOMORPHIC ENCRY...

TECHNIQUES FOR TWIDDLE FACTOR GENERATION FOR NUMBER-THEORETIC- TRAN...

TECHNIQUES FOR CONTENTION-FREE ROUTING FOR NUMBER-THEORETIC- TRANSF...

TECHNIQUES FOR TWIDDLE FACTOR GENERATION FOR NUMBER-THEORETIC-TRANS...

SIDE-CHANNEL RESISTANT MULTIPLICATIVELY MASKED AES ENGINE WITH ZERO...