Sagar UPADHYAY

Person

Folsom, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Smart prologue for nonvolatile memory program operation
- Patent number 12,254,933
- Issue date Mar 18, 2025
- INTEL NDTM US LLC
- Pranav Chava
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic program caching
- Patent number 12,230,334
- Issue date Feb 18, 2025
- INTEL NDTM US LLC
- Aliasgar S. Madraswala
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic gate steps for last-level programming to improve write perf...
- Patent number 12,211,563
- Issue date Jan 28, 2025
- Intel Corportaion
- Sagar Upadhyay
- G11 - INFORMATION STORAGE
Information Patent Grant
Skip program verify for dynamic start voltage sampling
- Patent number 12,189,955
- Issue date Jan 7, 2025
- INTEL NDTM US LLC
- Archana Tankasala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Block list management for wordline start voltage
- Patent number 12,154,627
- Issue date Nov 26, 2024
- Intel Corporation
- Sagar Upadhyay
- G11 - INFORMATION STORAGE
Information Patent Grant
Smart prologue for nonvolatile memory program operation
- Patent number 12,046,303
- Issue date Jul 23, 2024
- INTEL NDTM US LLC
- Pranav Chava
- G11 - INFORMATION STORAGE
Information Patent Grant
Progressive program suspend resume
- Patent number 11,923,016
- Issue date Mar 5, 2024
- Intel Corporation
- Aliasgar S. Madraswala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using variable voltages to discharge electrons from a memory array...
- Patent number 11,139,036
- Issue date Oct 5, 2021
- Intel Corporation
- Tarek Ahmed Ameen Beshari
- G11 - INFORMATION STORAGE
Information Patent Grant
Boosted bitlines for storage cell programmed state verification in...
- Patent number 11,056,203
- Issue date Jul 6, 2021
- Intel Corporation
- Xiang Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method, system, and apparatus for multi-tiered progressive memory p...
- Patent number 10,956,081
- Issue date Mar 23, 2021
- Intel Corporation
- David J. Pelster
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data storage device with operation based on temperature difference
- Patent number 10,276,252
- Issue date Apr 30, 2019
- Intel Corporation
- Aliasgar S. Madraswala
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SMART PROLOGUE FOR NONVOLATILE MEMORY PROGRAM OPERATION
- Publication number 20240290405
- Publication date Aug 29, 2024
- Intel NDTM US LLC
- Pranav CHAVA
- G11 - INFORMATION STORAGE
Information Patent Application
SIMULTANEOUS STATISTICAL MULTI-SUBBLOCK VERIFY FOR NAND MEMORIES
- Publication number 20240136002
- Publication date Apr 25, 2024
- Intel NDTM US LLC
- Tarek Ahmed AMEEN BESHARI
- G11 - INFORMATION STORAGE
Information Patent Application
EFFICIENT BITLINE STABILIZATION FOR PROGRAM INHIBIT IN NAND ARRAYS
- Publication number 20240136003
- Publication date Apr 25, 2024
- Intel NDTM US LLC
- Tarek Ahmed AMEEN BESHARI
- G11 - INFORMATION STORAGE
Information Patent Application
FAST AND EFFICIENT VERIFY RECOVERY AND ARRAY DISCHARGE FOR 3D NAND...
- Publication number 20240071532
- Publication date Feb 29, 2024
- Intel NDTM US LLC
- Tarek Ahmed AMEEN BESHARI
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS TO REDUCE TIME TO PROGRAM SINGLE LEVEL CELL BL...
- Publication number 20240013839
- Publication date Jan 11, 2024
- Intel NDTM US LLC
- Sagar UPADHYAY
- G11 - INFORMATION STORAGE
Information Patent Application
ENHANCED IO INTERFACE FOR PLC PROGRAM AND PROGRAM-SUSPEND-RESUME OP...
- Publication number 20230395107
- Publication date Dec 7, 2023
- Intel NDTM US LLC
- Aliasgar S. MADRASWALA
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-DECK NAND MEMORY WITH HYBRID DECK SLC
- Publication number 20230376215
- Publication date Nov 23, 2023
- Intel NDTM US LLC
- Aliasgar S Madraswala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC PROGRAM CACHING
- Publication number 20230317182
- Publication date Oct 5, 2023
- Intel NDTM US LLC
- Aliasgar S. MADRASWALA
- G11 - INFORMATION STORAGE
Information Patent Application
SKIP PROGRAM VERIFY FOR DYNAMIC START VOLTAGE SAMPLING
- Publication number 20230161478
- Publication date May 25, 2023
- Intel NDTM US LLC
- Archana TANKASALA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC NEGATIVE CHARGE PUMP FOR NON-VOLATILE MEMORY
- Publication number 20230138471
- Publication date May 4, 2023
- Intel NDTM US LLC
- Binh Ngo
- G11 - INFORMATION STORAGE
Information Patent Application
BLOCK LIST MANAGEMENT FOR WORDLINE START VOLTAGE
- Publication number 20230086751
- Publication date Mar 23, 2023
- Intel Corporation
- Sagar Upadhyay
- G11 - INFORMATION STORAGE
Information Patent Application
GROUPED GLOBAL WORDLINE DRIVER WITH SHARED BIAS SCHEME
- Publication number 20230082368
- Publication date Mar 16, 2023
- Intel Corporation
- Chang Wan Ha
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC GATE STEPS FOR LAST-LEVEL PROGRAMMING TO IMPROVE WRITE PERF...
- Publication number 20230061293
- Publication date Mar 2, 2023
- Intel Corporation
- Sagar Upadhyay
- G11 - INFORMATION STORAGE
Information Patent Application
DETECTED THRESHOLD VOLTAGE STATE DISTRIBUTION OF FIRST AND SECOND P...
- Publication number 20220262431
- Publication date Aug 18, 2022
- Intel NDTM US LLC
- Sagar Upadhyay
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRESSIVE PROGRAM SUSPEND RESUME
- Publication number 20220101927
- Publication date Mar 31, 2022
- Intel Corporation
- Aliasgar S. Madraswala
- G11 - INFORMATION STORAGE
Information Patent Application
SMART PROLOGUE FOR NONVOLATILE MEMORY PROGRAM OPERATION
- Publication number 20210383880
- Publication date Dec 9, 2021
- Intel Corporation
- Pranav CHAVA
- G11 - INFORMATION STORAGE
Information Patent Application
USING VARIABLE VOLTAGES TO DISCHARGE ELECTRONS FROM A MEMORY ARRAY...
- Publication number 20210249092
- Publication date Aug 12, 2021
- Intel Corporation
- Tarek Ahmed AMEEN BESHARI
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD, SYSTEM, AND APPARATUS FOR MULTI-TIERED PROGRESSIVE MEMORY P...
- Publication number 20190243577
- Publication date Aug 8, 2019
- Intel Corporation
- David J. PELSTER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA STORAGE DEVICE WITH OPERATION BASED ON TEMPERATURE DIFFERENCE
- Publication number 20190043596
- Publication date Feb 7, 2019
- Intel Corporation
- Aliasgar S. Madraswala
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD, SYSTEM, AND APPARATUS FOR DETECTING FAILURE OF PROGRAMMING...
- Publication number 20190006016
- Publication date Jan 3, 2019
- Intel Corporation
- Ali KHAKIFIROOZ
- G11 - INFORMATION STORAGE

Sagar UPADHYAY

Person

Patents Grantslast 30 patents

Smart prologue for nonvolatile memory program operation

Dynamic program caching

Dynamic gate steps for last-level programming to improve write perf...

Skip program verify for dynamic start voltage sampling

Block list management for wordline start voltage

Smart prologue for nonvolatile memory program operation

Progressive program suspend resume

Using variable voltages to discharge electrons from a memory array...

Boosted bitlines for storage cell programmed state verification in...

Method, system, and apparatus for multi-tiered progressive memory p...

Data storage device with operation based on temperature difference

Patents Applicationslast 30 patents

SMART PROLOGUE FOR NONVOLATILE MEMORY PROGRAM OPERATION

SIMULTANEOUS STATISTICAL MULTI-SUBBLOCK VERIFY FOR NAND MEMORIES

EFFICIENT BITLINE STABILIZATION FOR PROGRAM INHIBIT IN NAND ARRAYS

FAST AND EFFICIENT VERIFY RECOVERY AND ARRAY DISCHARGE FOR 3D NAND...

METHOD AND APPARATUS TO REDUCE TIME TO PROGRAM SINGLE LEVEL CELL BL...

ENHANCED IO INTERFACE FOR PLC PROGRAM AND PROGRAM-SUSPEND-RESUME OP...

MULTI-DECK NAND MEMORY WITH HYBRID DECK SLC

DYNAMIC PROGRAM CACHING

SKIP PROGRAM VERIFY FOR DYNAMIC START VOLTAGE SAMPLING

DYNAMIC NEGATIVE CHARGE PUMP FOR NON-VOLATILE MEMORY

BLOCK LIST MANAGEMENT FOR WORDLINE START VOLTAGE

GROUPED GLOBAL WORDLINE DRIVER WITH SHARED BIAS SCHEME

DYNAMIC GATE STEPS FOR LAST-LEVEL PROGRAMMING TO IMPROVE WRITE PERF...

DETECTED THRESHOLD VOLTAGE STATE DISTRIBUTION OF FIRST AND SECOND P...

PROGRESSIVE PROGRAM SUSPEND RESUME

SMART PROLOGUE FOR NONVOLATILE MEMORY PROGRAM OPERATION

USING VARIABLE VOLTAGES TO DISCHARGE ELECTRONS FROM A MEMORY ARRAY...

METHOD, SYSTEM, AND APPARATUS FOR MULTI-TIERED PROGRESSIVE MEMORY P...

DATA STORAGE DEVICE WITH OPERATION BASED ON TEMPERATURE DIFFERENCE

METHOD, SYSTEM, AND APPARATUS FOR DETECTING FAILURE OF PROGRAMMING...