Saikat Mandal

Person

Folsom, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Opportunistic late depth testing to prevent stalling for overlappin...
- Patent number 12,182,023
- Issue date Dec 31, 2024
- Intel Corporation
- Saikat Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhancing hierarchical depth buffer culling efficiency via mask acc...
- Patent number 12,020,370
- Issue date Jun 25, 2024
- Intel Corporation
- Saikat Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method using triangle pairs and shared transformation...
- Patent number 11,922,557
- Issue date Mar 5, 2024
- Intel Corporation
- Sven Woop
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for performing a stable and short latency sort...
- Patent number 11,900,498
- Issue date Feb 13, 2024
- Intel Corporation
- Saikat Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical depth buffer back annotation
- Patent number 11,615,584
- Issue date Mar 28, 2023
- Intel Corporation
- Vasanth Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhancing hierarchical depth buffer culling efficiency via mask acc...
- Patent number 11,615,585
- Issue date Mar 28, 2023
- Intel Corporation
- Saikat Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method using triangle pairs and shared transformation...
- Patent number 11,341,709
- Issue date May 24, 2022
- Intel Corporation
- Sven Woop
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low granularity coarse depth test efficiency enhancement
- Patent number 11,250,539
- Issue date Feb 15, 2022
- Intel Corporation
- Vasanth Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhancing hierarchical depth buffer culling efficiency via mask acc...
- Patent number 11,107,269
- Issue date Aug 31, 2021
- Intel Corporation
- Saikat Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for asynchronous ray tracing
- Patent number 11,087,522
- Issue date Aug 10, 2021
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical depth buffer back annotation
- Patent number 11,080,925
- Issue date Aug 3, 2021
- Intel Corporation
- Vasanth Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for optimizing a hierarchical depth buffer
- Patent number 10,839,595
- Issue date Nov 17, 2020
- Intel Corporation
- Vasanth Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low granularity coarse depth test efficiency enhancement
- Patent number 10,748,242
- Issue date Aug 18, 2020
- Intel Corporation
- Vasanth Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pixel compression mechanism
- Patent number 10,430,990
- Issue date Oct 1, 2019
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical depth buffer back annotaton
- Patent number 10,424,107
- Issue date Sep 24, 2019
- Intel Corporation
- Vasanth Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics with early stencil test
- Patent number 10,319,138
- Issue date Jun 11, 2019
- Intel Corporation
- Vasanth Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low granularity coarse depth test efficiency enhancement
- Patent number 10,102,609
- Issue date Oct 16, 2018
- Intel Corporation
- Vasanth Ranganathan
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
APPARATUS AND METHOD USING TRIANGLE PAIRS AND SHARED TRANSFORMATION...
- Publication number 20240282045
- Publication date Aug 22, 2024
- Intel Corporation
- Sven Woop
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR PERFORMING A STABLE AND SHORT LATENCY SORT...
- Publication number 20240265487
- Publication date Aug 8, 2024
- Intel Corporation
- Saikat MANDAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR ASYNCHRONOUS RAY TRACING
- Publication number 20240257433
- Publication date Aug 1, 2024
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENHANCING HIERARCHICAL DEPTH BUFFER CULLING EFFICIENCY VIA MASK ACC...
- Publication number 20230306681
- Publication date Sep 28, 2023
- Intel Corporation
- Saikat Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPPORTUNISTIC LATE DEPTH TESTING TO PREVENT STALLING FOR OVERLAPPIN...
- Publication number 20220414011
- Publication date Dec 29, 2022
- Intel Corporation
- Saikat Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERATION AND STORAGE OF COMPRESSED Z-PLANES IN GRAPHICS PROCESSING
- Publication number 20220383444
- Publication date Dec 1, 2022
- Intel Corporation
- Saikat Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD USING TRIANGLE PAIRS AND SHARED TRANSFORMATION...
- Publication number 20220366634
- Publication date Nov 17, 2022
- Intel Corporation
- Sven Woop
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR ASYNCHRONOUS RAY TRACING
- Publication number 20220130097
- Publication date Apr 28, 2022
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHICAL DEPTH BUFFER BACK ANNOTATION
- Publication number 20220051473
- Publication date Feb 17, 2022
- Intel Corporation
- Vasanth Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENHANCING HIERARCHICAL DEPTH BUFFER CULLING EFFICIENCY VIA MASK ACC...
- Publication number 20210390768
- Publication date Dec 16, 2021
- Intel Corporation
- Saikat Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR PERFORMING A STABLE AND SHORT LATENCY SORT...
- Publication number 20210295463
- Publication date Sep 23, 2021
- Intel Corporation
- Saikat MANDAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENHANCING HIERARCHICAL DEPTH BUFFER CULLING EFFICIENCY VIA MASK ACC...
- Publication number 20210174575
- Publication date Jun 10, 2021
- Intel Corporation
- Saikat Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD USING TRIANGLE PAIRS AND SHARED TRANSFORMATION...
- Publication number 20210097750
- Publication date Apr 1, 2021
- Intel Corporation
- Sven Woop
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW GRANULARITY COARSE DEPTH TEST EFFICIENCY ENHANCEMENT
- Publication number 20210035259
- Publication date Feb 4, 2021
- Intel Corporation
- Vasanth Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR OPTIMIZING A HIERARCHICAL DEPTH BUFFER
- Publication number 20200258292
- Publication date Aug 13, 2020
- Vasanth Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHICAL DEPTH BUFFER BACK ANNOTATON
- Publication number 20200098167
- Publication date Mar 26, 2020
- Intel Corporation
- Vasanth Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PIXEL COMPRESSION MECHANISM
- Publication number 20190087999
- Publication date Mar 21, 2019
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW GRANULARITY COARSE DEPTH TEST EFFICIENCY ENHANCEMENT
- Publication number 20190026855
- Publication date Jan 24, 2019
- Intel Corporation
- Vasanth Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS WITH EARLY STENCIL TEST
- Publication number 20180286102
- Publication date Oct 4, 2018
- Intel Corporation
- Vasanth Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW GRANULARITY COARSE DEPTH TEST EFFICIENCY ENHANCEMENT
- Publication number 20180286011
- Publication date Oct 4, 2018
- Intel Corporation
- Vasanth Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHICAL DEPTH BUFFER BACK ANNOTATON
- Publication number 20180286113
- Publication date Oct 4, 2018
- Vasanth Ranganathan
- G06 - COMPUTING CALCULATING COUNTING

Saikat Mandal

Person

Patents Grantslast 30 patents

Opportunistic late depth testing to prevent stalling for overlappin...

Enhancing hierarchical depth buffer culling efficiency via mask acc...

Apparatus and method using triangle pairs and shared transformation...

Apparatus and method for performing a stable and short latency sort...

Hierarchical depth buffer back annotation

Enhancing hierarchical depth buffer culling efficiency via mask acc...

Apparatus and method using triangle pairs and shared transformation...

Low granularity coarse depth test efficiency enhancement

Enhancing hierarchical depth buffer culling efficiency via mask acc...

Apparatus and method for asynchronous ray tracing

Hierarchical depth buffer back annotation

Apparatus and method for optimizing a hierarchical depth buffer

Low granularity coarse depth test efficiency enhancement

Pixel compression mechanism

Hierarchical depth buffer back annotaton

Graphics with early stencil test

Low granularity coarse depth test efficiency enhancement

Patents Applicationslast 30 patents

APPARATUS AND METHOD USING TRIANGLE PAIRS AND SHARED TRANSFORMATION...

APPARATUS AND METHOD FOR PERFORMING A STABLE AND SHORT LATENCY SORT...

APPARATUS AND METHOD FOR ASYNCHRONOUS RAY TRACING

ENHANCING HIERARCHICAL DEPTH BUFFER CULLING EFFICIENCY VIA MASK ACC...

OPPORTUNISTIC LATE DEPTH TESTING TO PREVENT STALLING FOR OVERLAPPIN...

GENERATION AND STORAGE OF COMPRESSED Z-PLANES IN GRAPHICS PROCESSING

APPARATUS AND METHOD USING TRIANGLE PAIRS AND SHARED TRANSFORMATION...

APPARATUS AND METHOD FOR ASYNCHRONOUS RAY TRACING

HIERARCHICAL DEPTH BUFFER BACK ANNOTATION

ENHANCING HIERARCHICAL DEPTH BUFFER CULLING EFFICIENCY VIA MASK ACC...

APPARATUS AND METHOD FOR PERFORMING A STABLE AND SHORT LATENCY SORT...

ENHANCING HIERARCHICAL DEPTH BUFFER CULLING EFFICIENCY VIA MASK ACC...

APPARATUS AND METHOD USING TRIANGLE PAIRS AND SHARED TRANSFORMATION...

LOW GRANULARITY COARSE DEPTH TEST EFFICIENCY ENHANCEMENT

APPARATUS AND METHOD FOR OPTIMIZING A HIERARCHICAL DEPTH BUFFER

HIERARCHICAL DEPTH BUFFER BACK ANNOTATON

PIXEL COMPRESSION MECHANISM

LOW GRANULARITY COARSE DEPTH TEST EFFICIENCY ENHANCEMENT

GRAPHICS WITH EARLY STENCIL TEST

LOW GRANULARITY COARSE DEPTH TEST EFFICIENCY ENHANCEMENT

HIERARCHICAL DEPTH BUFFER BACK ANNOTATON