Sairam Subramanian

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
In-line detection of electrical fails on integrated circuits
- Patent number 12,013,442
- Issue date Jun 18, 2024
- Intel Corporation
- Enlan Yuan
- G01 - MEASURING TESTING
Information Patent Grant
Self-aligned gate endcap (SAGE) architecture having gate contacts
- Patent number 11,935,892
- Issue date Mar 19, 2024
- Intel Corporation
- Sairam Subramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned gate endcap (SAGE) architecture having gate or contact...
- Patent number 11,876,121
- Issue date Jan 16, 2024
- Intel Corporation
- Sairam Subramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device terminal interconnect structures
- Patent number 11,791,257
- Issue date Oct 17, 2023
- Intel Corporation
- Sairam Subramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned gate endcap (SAGE) architecture having local interconn...
- Patent number 11,705,453
- Issue date Jul 18, 2023
- Intel Corporation
- Sairam Subramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual self-aligned gate endcap (SAGE) architectures
- Patent number 11,688,792
- Issue date Jun 27, 2023
- Intel Corporation
- Sairam Subramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Unidirectional self-aligned gate endcap (SAGE) architectures with g...
- Patent number 11,605,632
- Issue date Mar 14, 2023
- Intel Corporation
- Walid M. Hafez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate endcap architectures having relatively short vertical stack
- Patent number 11,563,000
- Issue date Jan 24, 2023
- Intel Corporation
- Sairam Subramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned gate endcap (SAGE) architecture having gate or contact...
- Patent number 11,444,171
- Issue date Sep 13, 2022
- Intel Corporation
- Sairam Subramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned gate endcap (SAGE) architecture having gate contacts
- Patent number 11,424,245
- Issue date Aug 23, 2022
- Intel Corporation
- Sairam Subramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned gate endcap (SAGE) architecture having endcap plugs
- Patent number 11,329,138
- Issue date May 10, 2022
- Intel Corporation
- Sairam Subramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device terminal interconnect structures
- Patent number 11,227,829
- Issue date Jan 18, 2022
- Intel Corporation
- Sairam Subramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Unidirectional self-aligned gate endcap (SAGE) architectures with g...
- Patent number 11,217,582
- Issue date Jan 4, 2022
- Intel Corporation
- Walid M. Hafez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual self-aligned gate endcap (SAGE) architectures
- Patent number 11,205,708
- Issue date Dec 21, 2021
- Intel Corporation
- Sairam Subramanian
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
DEVICE UNDER TEST (DUT) STRUCTURES IN FILL REGIONS OF PRODUCT DIE F...
- Publication number 20240329114
- Publication date Oct 3, 2024
- Intel Corporation
- Sairam Subramanian
- G01 - MEASURING TESTING
Information Patent Application
DEVICE UNDER TEST (DUT) STRUCTURES FOR VOLTAGE CONTRAST (VC) DETECT...
- Publication number 20240329122
- Publication date Oct 3, 2024
- Intel Corporation
- Sairam SUBRAMANIAN
- G01 - MEASURING TESTING
Information Patent Application
SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURE HAVING GATE CONTACTS
- Publication number 20240145477
- Publication date May 2, 2024
- Intel Corporation
- Sairam Subramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DESIGN OF VOLTAGE CONTRAST PROCESS MONITOR
- Publication number 20240112962
- Publication date Apr 4, 2024
- Intel Corporation
- Xiao WEN
- G01 - MEASURING TESTING
Information Patent Application
VOLTAGE CONTRAST STRUCTURE FOR TRENCH CONNECTORS
- Publication number 20240006501
- Publication date Jan 4, 2024
- Intel Corporation
- Xiao WEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VOLTAGE CONTRAST SCAN AREA ON A WAFER
- Publication number 20240006254
- Publication date Jan 4, 2024
- Intel Corporation
- Xiao WEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING...
- Publication number 20230299081
- Publication date Sep 21, 2023
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING...
- Publication number 20230299165
- Publication date Sep 21, 2023
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE CUT STRUCTURES FORMED BEFORE DUMMY GATE
- Publication number 20230282483
- Publication date Sep 7, 2023
- Intel Corporation
- Leonard P. Guler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONDUCTIVE VIA BAR SELF-ALIGNED TO GATE END
- Publication number 20220399445
- Publication date Dec 15, 2022
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING...
- Publication number 20220393013
- Publication date Dec 8, 2022
- Intel Corporation
- Leonard P. GULER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURE HAVING GATE OR CONTACT...
- Publication number 20220359705
- Publication date Nov 10, 2022
- Intel Corporation
- Sairam Subramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURE HAVING GATE CONTACTS
- Publication number 20220352165
- Publication date Nov 3, 2022
- INTEL CORPORATION
- Sairam Subramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE TERMINAL INTERCONNECT STRUCTURES
- Publication number 20220122911
- Publication date Apr 21, 2022
- Intel Corporation
- Sairam Subramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ADJACENT GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING NON-M...
- Publication number 20220093588
- Publication date Mar 24, 2022
- Intel Corporation
- Sairam SUBRAMANIAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES
- Publication number 20220077302
- Publication date Mar 10, 2022
- Intel Corporation
- Sairam SUBRAMANIAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
UNIDIRECTIONAL SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES WITH G...
- Publication number 20220077145
- Publication date Mar 10, 2022
- Intel Corporation
- Walid M. HAFEZ
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE ENDCAP ARCHITECTURES HAVING RELATIVELY SHORT VERTICAL STACK
- Publication number 20210305243
- Publication date Sep 30, 2021
- Intel Corporation
- Sairam SUBRAMANIAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURE HAVING VERTICAL TRANSI...
- Publication number 20200411665
- Publication date Dec 31, 2020
- Intel Corporation
- Walid M. HAFEZ
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURE HAVING LOCAL INTERCONN...
- Publication number 20200286891
- Publication date Sep 10, 2020
- Intel Corporation
- Sairam SUBRAMANIAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURE HAVING GATE OR CONTACT...
- Publication number 20200287015
- Publication date Sep 10, 2020
- Intel Corporation
- Sairam Subramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURE HAVING GATE CONTACTS
- Publication number 20200286890
- Publication date Sep 10, 2020
- Intel Corporation
- Sairam Subramanian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IN-LINE DETECTION OF ELECTRICAL FAILS ON INTEGRATED CIRCUITS
- Publication number 20200103451
- Publication date Apr 2, 2020
- Enlan YUAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES
- Publication number 20190305112
- Publication date Oct 3, 2019
- Sairam SUBRAMANIAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
UNIDIRECTIONAL SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES WITH G...
- Publication number 20190304971
- Publication date Oct 3, 2019
- Intel Corporation
- Walid M. HAFEZ
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURE HAVING ENDCAP PLUGS
- Publication number 20190305111
- Publication date Oct 3, 2019
- Intel Corporation
- Sairam SUBRAMANIAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE TERMINAL INTERCONNECT STRUCTURES
- Publication number 20190304902
- Publication date Oct 3, 2019
- Intel Corporation
- Sairam Subramanian
- H01 - BASIC ELECTRIC ELEMENTS

Sairam Subramanian

Person

Patents Grantslast 30 patents

In-line detection of electrical fails on integrated circuits

Self-aligned gate endcap (SAGE) architecture having gate contacts

Self-aligned gate endcap (SAGE) architecture having gate or contact...

Device terminal interconnect structures

Self-aligned gate endcap (SAGE) architecture having local interconn...

Dual self-aligned gate endcap (SAGE) architectures

Unidirectional self-aligned gate endcap (SAGE) architectures with g...

Gate endcap architectures having relatively short vertical stack

Self-aligned gate endcap (SAGE) architecture having gate or contact...

Self-aligned gate endcap (SAGE) architecture having gate contacts

Self-aligned gate endcap (SAGE) architecture having endcap plugs

Device terminal interconnect structures

Unidirectional self-aligned gate endcap (SAGE) architectures with g...

Dual self-aligned gate endcap (SAGE) architectures

Patents Applicationslast 30 patents

DEVICE UNDER TEST (DUT) STRUCTURES IN FILL REGIONS OF PRODUCT DIE F...

DEVICE UNDER TEST (DUT) STRUCTURES FOR VOLTAGE CONTRAST (VC) DETECT...

SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURE HAVING GATE CONTACTS

DESIGN OF VOLTAGE CONTRAST PROCESS MONITOR

VOLTAGE CONTRAST STRUCTURE FOR TRENCH CONNECTORS

VOLTAGE CONTRAST SCAN AREA ON A WAFER

FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING...

FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING...

GATE CUT STRUCTURES FORMED BEFORE DUMMY GATE

CONDUCTIVE VIA BAR SELF-ALIGNED TO GATE END

FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING...

SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURE HAVING GATE OR CONTACT...

SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURE HAVING GATE CONTACTS

DEVICE TERMINAL INTERCONNECT STRUCTURES

ADJACENT GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING NON-M...

DUAL SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES

UNIDIRECTIONAL SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES WITH G...

GATE ENDCAP ARCHITECTURES HAVING RELATIVELY SHORT VERTICAL STACK

SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURE HAVING VERTICAL TRANSI...

SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURE HAVING LOCAL INTERCONN...

SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURE HAVING GATE OR CONTACT...

SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURE HAVING GATE CONTACTS

IN-LINE DETECTION OF ELECTRICAL FAILS ON INTEGRATED CIRCUITS

DUAL SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES

UNIDIRECTIONAL SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES WITH G...

SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURE HAVING ENDCAP PLUGS

DEVICE TERMINAL INTERCONNECT STRUCTURES