Sajid Kabeer

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Tempe, AZ, US

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Patents Grantslast 30 patents

Information Patent Grant
Floating gate spacer for controlling a source region formation in a...
- Patent number 10,424,589
- Issue date Sep 24, 2019
- Microchip Technology Incorporated
- James Walls
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a polysilicon sidewall oxide region in a memory cell
- Patent number 10,050,131
- Issue date Aug 14, 2018
- Microchip Technology Incorporated
- Jack Wong
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Floating Gate Spacer For Controlling A Source Region Formation In A...
- Publication number 20190252395
- Publication date Aug 15, 2019
- MICROCHIP TECHNOLOGY INCORPORATED
- James Walls
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Split-Gate Memory Cell With Field-Enhanced Source Junctions, And Me...
- Publication number 20190207034
- Publication date Jul 4, 2019
- MICROCHIP TECHNOLOGY INCORPORATED
- Sonu Daryanani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method Of Forming A Polysilicon Sidewall Oxide Region In A Memory Cell
- Publication number 20170170303
- Publication date Jun 15, 2017
- MICROCHIP TECHNOLOGY INCORPORATED
- Jack Wong
- H01 - BASIC ELECTRIC ELEMENTS