Salim U. Chowdhury

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods and apparatus for repeater count reduction via concurrent g...
- Patent number 9,665,681
- Issue date May 30, 2017
- Oracle International Corporation
- Guo Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Concurrent timing-driven topology construction and buffering for VL...
- Patent number 9,552,454
- Issue date Jan 24, 2017
- Oracle International Corporation
- Salim Chowdhury
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Gate substitution based system and method for integrated circuit po...
- Patent number 9,317,641
- Issue date Apr 19, 2016
- Oracle International Corporation
- Salim U. Chowdhury
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for selecting gate sizes, repeater locations, and...
- Patent number 8,612,917
- Issue date Dec 17, 2013
- Oracle America, Inc.
- Salim U. Chowdhury
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for selecting gates in a logic block
- Patent number 8,176,459
- Issue date May 8, 2012
- Oracle America, Inc.
- Salim U. Chowdhury
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systematic approach for performing cell replacement in a circuit to...
- Patent number 7,949,976
- Issue date May 24, 2011
- Oracle America, Inc.
- Jingyan Zuo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Repeater insertion for concurrent setup time and hold time violations
- Patent number 7,454,730
- Issue date Nov 18, 2008
- Sun Microsystems, Inc.
- Salim U. Chowdhury
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for placing repeaters in a network of an integ...
- Patent number 6,493,854
- Issue date Dec 10, 2002
- Motorola, Inc.
- Salim U. Chowdhury
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Methods and Apparatus for Repeater Count Reduction via Concurrent G...
- Publication number 20160092626
- Publication date Mar 31, 2016
- Oracle International Corporation
- Guo Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONCURRENT TIMING-DRIVEN TOPOLOGY CONSTRUCTION AND BUFFERING FOR VL...
- Publication number 20150213188
- Publication date Jul 30, 2015
- Oracle International Corporation
- Salim Chowdhury
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System And Method For Integrated Circuit Power And Timing Optimization
- Publication number 20120066658
- Publication date Mar 15, 2012
- Oracle International Corporation
- Salim U. Chowdhury
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND SYSTEM FOR SELECTING GATE SIZES, REPEATER LOCATIONS, AN...
- Publication number 20100287516
- Publication date Nov 11, 2010
- SUN MICROSYSTEMS, INC.
- Salim U. Chowdhury
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR SELECTING GATES IN A LOGIC BLOCK
- Publication number 20100146469
- Publication date Jun 10, 2010
- SUN MICROSYSTEMS, INC.
- Salim U. Chowdhury
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMATIC APPROACH FOR PERFORMING CELL REPLACEMENT IN A CIRCUIT TO...
- Publication number 20090293029
- Publication date Nov 26, 2009
- Jingyan Zuo
- G06 - COMPUTING CALCULATING COUNTING

Salim U. Chowdhury

Person

Patents Grantslast 30 patents

Methods and apparatus for repeater count reduction via concurrent g...

Concurrent timing-driven topology construction and buffering for VL...

Gate substitution based system and method for integrated circuit po...

Method and system for selecting gate sizes, repeater locations, and...

System and method for selecting gates in a logic block

Systematic approach for performing cell replacement in a circuit to...

Repeater insertion for concurrent setup time and hold time violations

Method and apparatus for placing repeaters in a network of an integ...

Patents Applicationslast 30 patents

Methods and Apparatus for Repeater Count Reduction via Concurrent G...

CONCURRENT TIMING-DRIVEN TOPOLOGY CONSTRUCTION AND BUFFERING FOR VL...

System And Method For Integrated Circuit Power And Timing Optimization

METHODS AND SYSTEM FOR SELECTING GATE SIZES, REPEATER LOCATIONS, AN...

SYSTEM AND METHOD FOR SELECTING GATES IN A LOGIC BLOCK

SYSTEMATIC APPROACH FOR PERFORMING CELL REPLACEMENT IN A CIRCUIT TO...