Salvatore Talluto

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Cavanago di Brianza, IT

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Patents Grantslast 30 patents

Information Patent Grant
Validating test patterns ported between different levels of a hiera...
- Patent number 12,352,811
- Issue date Jul 8, 2025
- Synopsys, Inc.
- Andrea Costa
- G01 - MEASURING TESTING
Information Patent Grant
Packetized power-on-self-test controller for built-in self-test
- Patent number 11,626,178
- Issue date Apr 11, 2023
- Synopsys, Inc.
- Anubhav Sinha
- G11 - INFORMATION STORAGE
Information Patent Grant
Layout-aware test pattern generation and fault detection
- Patent number 11,237,210
- Issue date Feb 1, 2022
- Synopsys, Inc.
- Alodeep Sanyal
- G01 - MEASURING TESTING
Information Patent Grant
Controlling clocks and resets in a logic built in self-test
- Patent number 11,132,484
- Issue date Sep 28, 2021
- Synopsys, Inc.
- Frederic Neuveux
- G01 - MEASURING TESTING
Information Patent Grant
Layout-aware test pattern generation and fault detection
- Patent number 10,254,343
- Issue date Apr 9, 2019
- Synopsys, Inc.
- Alodeep Sanyal
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
PACKETIZED POWER-ON-SELF-TEST CONTROLLER FOR BUILT-IN SELF-TEST
- Publication number 20220108760
- Publication date Apr 7, 2022
- Synopsys, Inc.
- Anubhav SINHA
- G11 - INFORMATION STORAGE
Information Patent Application
LAYOUT-AWARE TEST PATTERN GENERATION AND FAULT DETECTION
- Publication number 20140032156
- Publication date Jan 30, 2014
- Synopsys, Inc.
- Alodeep Sanyal
- G01 - MEASURING TESTING