Sam Gat-Shang Chu

Person

Round Rock, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Register file
- Patent number 7,679,973
- Issue date Mar 16, 2010
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory circuits with reduced leakage power and design structures fo...
- Patent number 7,668,035
- Issue date Feb 23, 2010
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for providing multiple reads/writes using a 2R...
- Patent number 7,663,963
- Issue date Feb 16, 2010
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register file cell with soft error detection and circuits and metho...
- Patent number 7,562,273
- Issue date Jul 14, 2009
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Data shifting through scan registers
- Patent number 7,551,475
- Issue date Jun 23, 2009
- International Business Machines Corporation
- Vikas Agarwal
- G01 - MEASURING TESTING
Information Patent Grant
Transient noise detection scheme and apparatus
- Patent number 7,506,230
- Issue date Mar 17, 2009
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shift register latch with embedded dynamic random access memory sca...
- Patent number 7,474,574
- Issue date Jan 6, 2009
- International Business Machines Corporation
- Vikas Agarwal
- G11 - INFORMATION STORAGE
Information Patent Grant
Register file
- Patent number 7,443,737
- Issue date Oct 28, 2008
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for providing multiple reads/writes using a 2read/2write reg...
- Patent number 7,400,548
- Issue date Jul 15, 2008
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus, system and method for quickly determining an oldest inst...
- Patent number 7,302,553
- Issue date Nov 27, 2007
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for speeding up access time of a large registe...
- Patent number 7,243,209
- Issue date Jul 10, 2007
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Leakage sensing and keeper circuit for proper operation of a dynami...
- Patent number 7,202,704
- Issue date Apr 10, 2007
- International Business Machines Corporation
- Sam Gat-Shang Chu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Register file method incorporating read-after-write blocking using...
- Patent number 7,142,463
- Issue date Nov 28, 2006
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic-static logical control element for signaling an interval be...
- Patent number 7,015,723
- Issue date Mar 21, 2006
- International Business Machines Corporation
- Sam Gat-Shang Chu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Register file apparatus and method incorporating read-after-write b...
- Patent number 7,012,839
- Issue date Mar 14, 2006
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Multilevel register-file bit-read method and apparatus
- Patent number 7,002,860
- Issue date Feb 21, 2006
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Reducing sub-threshold leakage in a memory array
- Patent number 6,934,181
- Issue date Aug 23, 2005
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of power consumption reduction in clocked circuits
- Patent number 6,922,818
- Issue date Jul 26, 2005
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register-file bit-read method and apparatus
- Patent number 6,914,450
- Issue date Jul 5, 2005
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for reducing power consumption in a memory arr...
- Patent number 6,914,849
- Issue date Jul 5, 2005
- International Business Machines Corporation
- Tai Anh Cao
- G11 - INFORMATION STORAGE
Information Patent Grant
Enhanced debug scheme for LBIST
- Patent number 6,901,546
- Issue date May 31, 2005
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MEMORY CIRCUITS WITH REDUCED LEAKAGE POWER AND DESIGN STRUCTURES FO...
- Publication number 20090251974
- Publication date Oct 8, 2009
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE
Information Patent Application
Eight Transistor Tri-State Driver Implementing Cascade Structures T...
- Publication number 20090027081
- Publication date Jan 29, 2009
- International Business Machines Corporation
- Aleksandr Kaplun
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SHIFT REGISTER LATCH WITH EMBEDDED DYNAMIC RANDOM ACCESS MEMORY SCA...
- Publication number 20090010077
- Publication date Jan 8, 2009
- Vikas Agarwal
- G11 - INFORMATION STORAGE
Information Patent Application
REGISTER FILE
- Publication number 20080279015
- Publication date Nov 13, 2008
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and Method for Providing Multiple Reads/Writes Using a 2R...
- Publication number 20080239860
- Publication date Oct 2, 2008
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Register file cell with soft error detection and circuits and metho...
- Publication number 20070300131
- Publication date Dec 27, 2007
- International Business Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE
Information Patent Application
Leakage sensing and keeper circuit for proper operation of a dynami...
- Publication number 20060049850
- Publication date Mar 9, 2006
- International Business Machines Corporation
- Sam Gat-Shang Chu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Register file method incorporating read-after-write blocking using...
- Publication number 20060039202
- Publication date Feb 23, 2006
- International Busines Machines Corporation
- Sam Gat-Shang Chu
- G11 - INFORMATION STORAGE

Sam Gat-Shang Chu

Person

Patents Grantslast 30 patents

Register file

Memory circuits with reduced leakage power and design structures fo...

Apparatus and method for providing multiple reads/writes using a 2R...

Register file cell with soft error detection and circuits and metho...

Data shifting through scan registers

Transient noise detection scheme and apparatus

Shift register latch with embedded dynamic random access memory sca...

Register file

Method for providing multiple reads/writes using a 2read/2write reg...

Apparatus, system and method for quickly determining an oldest inst...

Apparatus and method for speeding up access time of a large registe...

Leakage sensing and keeper circuit for proper operation of a dynami...

Register file method incorporating read-after-write blocking using...

Dynamic-static logical control element for signaling an interval be...

Register file apparatus and method incorporating read-after-write b...

Multilevel register-file bit-read method and apparatus

Reducing sub-threshold leakage in a memory array

Method of power consumption reduction in clocked circuits

Register-file bit-read method and apparatus

Method and apparatus for reducing power consumption in a memory arr...

Enhanced debug scheme for LBIST

Patents Applicationslast 30 patents

MEMORY CIRCUITS WITH REDUCED LEAKAGE POWER AND DESIGN STRUCTURES FO...

Eight Transistor Tri-State Driver Implementing Cascade Structures T...

SHIFT REGISTER LATCH WITH EMBEDDED DYNAMIC RANDOM ACCESS MEMORY SCA...

REGISTER FILE

Apparatus and Method for Providing Multiple Reads/Writes Using a 2R...

Register file cell with soft error detection and circuits and metho...

Leakage sensing and keeper circuit for proper operation of a dynami...

Register file method incorporating read-after-write blocking using...