Sam Hedinger

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San Jose, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Cache debug system for programmable circuits
- Patent number 9,594,655
- Issue date Mar 14, 2017
- Altera Corporation
- Manoj Reghunath
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bridge circuitry for communications with dynamically reconfigurable...
- Patent number 9,465,763
- Issue date Oct 11, 2016
- Altera Corporation
- Robert L. Pelt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for AXI ID compression
- Patent number 9,379,980
- Issue date Jun 28, 2016
- Altera Corporation
- Sam Hedinger
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Protocol error monitoring on an interface between hard logic and so...
- Patent number 9,170,911
- Issue date Oct 27, 2015
- Altera Corporation
- Sean R. Atsatt
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CACHE DEBUG SYSTEM FOR PROGRAMMABLE CIRCUITS
- Publication number 20150033075
- Publication date Jan 29, 2015
- Altera Corporation
- Manoj Reghunath
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BRIDGE CIRCUITRY FOR COMMUNICATIONS WITH DYNAMICALLY RECONFIGURABLE...
- Publication number 20140372654
- Publication date Dec 18, 2014
- Altera Corporation
- Robert L. Pelt
- G06 - COMPUTING CALCULATING COUNTING