Samie B. Samaan

Person

West Linn, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Test, validation, and debug architecture
- Patent number 10,198,333
- Issue date Feb 5, 2019
- Intel Corporation
- Mark B. Trobough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for securely protecting a processor in...
- Patent number 10,009,339
- Issue date Jun 26, 2018
- Intel Corporation
- Sergiu D. Ghetie
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Non-linear control for voltage regulator
- Patent number 9,696,350
- Issue date Jul 4, 2017
- Intel Corporation
- Edward A. Burton
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Register alias table cache to map a logical register to a physical...
- Patent number 7,711,898
- Issue date May 4, 2010
- Intel Corporation
- Avinash Sodani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system to self-test single and multi-core CPU systems
- Patent number 7,463,992
- Issue date Dec 9, 2008
- Intel Corporation
- Samie B. Samaan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determination of cache entry for future operation
- Patent number 7,363,430
- Issue date Apr 22, 2008
- Intel Corporation
- Samie B. Samaan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for measuring relative, within-die leakage cur...
- Patent number 7,193,427
- Issue date Mar 20, 2007
- Intel Corporation
- Marijan Persun
- G01 - MEASURING TESTING
Information Patent Grant
Device and method for probing instantaneous high-speed local supply...
- Patent number 6,737,880
- Issue date May 18, 2004
- Intel Corporation
- Samie B. Samaan
- G01 - MEASURING TESTING
Information Patent Grant
Parameter variation probing technique
- Patent number 6,535,013
- Issue date Mar 18, 2003
- Intel Corporation
- Samie B. Samaan
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
System, Apparatus And Method For Securely Protecting A Processor In...
- Publication number 20170289129
- Publication date Oct 5, 2017
- Sergiu D. Ghetie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEST, VALIDATION, AND DEBUG ARCHITECTURE
- Publication number 20150127983
- Publication date May 7, 2015
- Intel Corporation
- Mark B. Trobough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system to self-test single and multi-core CPU systems
- Publication number 20080082285
- Publication date Apr 3, 2008
- Samie B. Samaan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Determination of cache entry for future operation
- Publication number 20060230228
- Publication date Oct 12, 2006
- Samie B. Samaan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Register file cache
- Publication number 20050138297
- Publication date Jun 23, 2005
- Intel Corporation
- Avinash Sodani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Register alias table cache
- Publication number 20050138338
- Publication date Jun 23, 2005
- Intel Corporation
- Avinash Sodani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for measuring relative, within-die leakage cur...
- Publication number 20040263192
- Publication date Dec 30, 2004
- Marijan Persun
- G01 - MEASURING TESTING
Information Patent Application
A METHOD AND APPARATUS FOR MEASURING LEAKAGE CURRENT AND/OR TEMPERA...
- Publication number 20040263200
- Publication date Dec 30, 2004
- Marijan Persun
- G01 - MEASURING TESTING
Information Patent Application
Device and method for probing instantaneous high-speed local supply...
- Publication number 20020167327
- Publication date Nov 14, 2002
- Samie B. Samaan
- G01 - MEASURING TESTING
Information Patent Application
Parameter variation probing technique
- Publication number 20020084797
- Publication date Jul 4, 2002
- Samie B. Samaan
- G01 - MEASURING TESTING

Samie B. Samaan

Person

Patents Grantslast 30 patents

Test, validation, and debug architecture

System, apparatus and method for securely protecting a processor in...

Non-linear control for voltage regulator

Register alias table cache to map a logical register to a physical...

Method and system to self-test single and multi-core CPU systems

Determination of cache entry for future operation

Method and apparatus for measuring relative, within-die leakage cur...

Device and method for probing instantaneous high-speed local supply...

Parameter variation probing technique

Patents Applicationslast 30 patents

System, Apparatus And Method For Securely Protecting A Processor In...

TEST, VALIDATION, AND DEBUG ARCHITECTURE

Method and system to self-test single and multi-core CPU systems

Determination of cache entry for future operation

Register file cache

Register alias table cache

Method and apparatus for measuring relative, within-die leakage cur...

A METHOD AND APPARATUS FOR MEASURING LEAKAGE CURRENT AND/OR TEMPERA...

Device and method for probing instantaneous high-speed local supply...

Parameter variation probing technique