Samit Sengupta

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Fuse-based logic repair
- Patent number 10,853,542
- Issue date Dec 1, 2020
- QUALCOMM Incorporated
- Samit Sengupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing or avoiding mechanical stress in static random access memo...
- Patent number 10,490,558
- Issue date Nov 26, 2019
- QUALCOMM Incorporated
- Youn Sung Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and method of varying gate lengths of multiple cores
- Patent number 9,461,040
- Issue date Oct 4, 2016
- QUALCOMM Incorporated
- Ming Cai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device having high mobility channel
- Patent number 9,245,971
- Issue date Jan 26, 2016
- QUALCOMM Incorporated
- Bin Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and method of varying gate lengths of multiple cores
- Patent number 9,076,775
- Issue date Jul 7, 2015
- QUALCOMM Incorporated
- Ming Cai
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
FUSE-BASED LOGIC REPAIR
- Publication number 20200394274
- Publication date Dec 17, 2020
- QUALCOMM Incorporated
- Samit SENGUPTA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH DENSITY FIN FIELD-EFFECT TRANSISTOR (FINFET)
- Publication number 20200251473
- Publication date Aug 6, 2020
- QUALCOMM Incorporated
- Xia LI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTRALAYER CONDUCTIVE DEFECT DETECTION STRUCTURE
- Publication number 20200166566
- Publication date May 28, 2020
- QUALCOMM Incorporated
- Samit SENGUPTA
- G01 - MEASURING TESTING
Information Patent Application
TRANSISTOR GATE STRUCTURE
- Publication number 20200098920
- Publication date Mar 26, 2020
- QUALCOMM Incorporated
- Fadoua CHAFIK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TEST STRUCTURE FOR INLINE DETECTION OF INTERLAYER METAL DEFECTS
- Publication number 20200027801
- Publication date Jan 23, 2020
- QUALCOMM Incorporated
- Fadoua CHAFIK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REDUCING OR AVOIDING MECHANICAL STRESS IN STATIC RANDOM ACCESS MEMO...
- Publication number 20180350819
- Publication date Dec 6, 2018
- QUALCOMM Incorporated
- Youn Sung Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTIGATE TRANSISTOR DEVICE AND METHOD OF ISOLATING ADJACENT TRANSI...
- Publication number 20160093511
- Publication date Mar 31, 2016
- QUALCOMM Incorporated
- Samit SENGUPTA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEM AND METHOD OF VARYING GATE LENGTHS OF MULTIPLE CORES
- Publication number 20150311198
- Publication date Oct 29, 2015
- QUALCOMM Incorporated
- Ming Cai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE HAVING HIGH MOBILITY CHANNEL
- Publication number 20150091060
- Publication date Apr 2, 2015
- QUALCOMM Incorporated
- Bin Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEM AND METHOD OF VARYING GATE LENGTHS OF MULTIPLE CORES
- Publication number 20150061037
- Publication date Mar 5, 2015
- QUALCOMM Incorporated
- Ming Cai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CMOS TECHNOLOGY INTEGRATION
- Publication number 20150001631
- Publication date Jan 1, 2015
- QUALCOMM Incorporated
- Xia LI
- H01 - BASIC ELECTRIC ELEMENTS

Samit Sengupta

Person

Patents Grantslast 30 patents

Fuse-based logic repair

Reducing or avoiding mechanical stress in static random access memo...

System and method of varying gate lengths of multiple cores

Semiconductor device having high mobility channel

System and method of varying gate lengths of multiple cores

Patents Applicationslast 30 patents

FUSE-BASED LOGIC REPAIR

HIGH DENSITY FIN FIELD-EFFECT TRANSISTOR (FINFET)

INTRALAYER CONDUCTIVE DEFECT DETECTION STRUCTURE

TRANSISTOR GATE STRUCTURE

TEST STRUCTURE FOR INLINE DETECTION OF INTERLAYER METAL DEFECTS

REDUCING OR AVOIDING MECHANICAL STRESS IN STATIC RANDOM ACCESS MEMO...

MULTIGATE TRANSISTOR DEVICE AND METHOD OF ISOLATING ADJACENT TRANSI...

SYSTEM AND METHOD OF VARYING GATE LENGTHS OF MULTIPLE CORES

SEMICONDUCTOR DEVICE HAVING HIGH MOBILITY CHANNEL

SYSTEM AND METHOD OF VARYING GATE LENGTHS OF MULTIPLE CORES

CMOS TECHNOLOGY INTEGRATION