Samudyatha Chakki

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Austin, TX, US

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Patents Grantslast 30 patents

Information Patent Grant
Selecting a low power state based on cache flush latency determination
- Patent number 10,963,038
- Issue date Mar 30, 2021
- Intel Corporation
- Sundar Ramani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selecting a low power state based on cache flush latency determination
- Patent number 10,198,065
- Issue date Feb 5, 2019
- Intel Corporation
- Sundar Ramani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selecting a low power state based on cache flush latency determination
- Patent number 9,665,153
- Issue date May 30, 2017
- Intel Corporation
- Sundar Ramani
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Selecting A Low Power State Based On Cache Flush Latency Determination
- Publication number 20190155370
- Publication date May 23, 2019
- Intel Corporation
- Sundar Ramani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Selecting A Low Power State Based On Cache Flush Latency Determination
- Publication number 20170228014
- Publication date Aug 10, 2017
- Intel Corporation
- Sundar Ramani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Selecting A Low Power State Based On Cache Flush Latency Determination
- Publication number 20150268711
- Publication date Sep 24, 2015
- Sundar Ramani
- G06 - COMPUTING CALCULATING COUNTING