Samuel T. Ray

Person

Morgan Hill, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Real-time DC-balance aware AFE offset cancellation
- Patent number 11,881,969
- Issue date Jan 23, 2024
- Samsung Display Co., Ltd.
- Anup P Jose
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Dual loop voltage regulator utilizing gain and phase shaping
- Patent number 11,693,441
- Issue date Jul 4, 2023
- Samsung Display Co., Ltd.
- Samuel T. Ray
- G05 - CONTROLLING REGULATING
Information Patent Grant
Dual loop voltage regulator utilizing gain and phase shaping
- Patent number 11,474,550
- Issue date Oct 18, 2022
- SAMSUNG DISPLAY CO., LTD.
- Samuel T. Ray
- G05 - CONTROLLING REGULATING
Information Patent Grant
Implementing CML multiplexer load balancing
- Patent number 7,812,643
- Issue date Oct 12, 2010
- International Business Machines Corporation
- Shashikala Govindu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and system for high frequency clock signal gating
- Patent number 7,279,950
- Issue date Oct 9, 2007
- International Business Machines Corporation
- Hayden C. Cranford, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electronic component value trimming systems
- Patent number 7,081,842
- Issue date Jul 25, 2006
- International Business Machines Corporation
- Hayden Clavie Cranford, Jr.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Differential SCSI driver rise time and amplitude control circuit
- Patent number 6,597,233
- Issue date Jul 22, 2003
- International Business Machines Corporation
- Samuel T. Ray
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
REAL-TIME DC-BALANCE AWARE AFE OFFSET CANCELLATION
- Publication number 20230344681
- Publication date Oct 26, 2023
- Samsung Electronics Co., Ltd.
- Anup P. JOSE
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DUAL LOOP VOLTAGE REGULATOR UTILIZING GAIN AND PHASE SHAPING
- Publication number 20230004181
- Publication date Jan 5, 2023
- SAMSUNG DISPLAY CO., LTD.
- Samuel T. Ray
- G05 - CONTROLLING REGULATING
Information Patent Application
DUAL LOOP VOLTAGE REGULATOR UTILIZING GAIN AND PHASE SHAPING
- Publication number 20220137655
- Publication date May 5, 2022
- SAMSUNG DISPLAY CO., LTD.
- Samuel T. Ray
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
Implementing CML Multiplexer Load Balancing
- Publication number 20100194437
- Publication date Aug 5, 2010
- International Business Machines Corporation
- Shashikala Govindu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND SYSTEM FOR HIGH FREQUENCY CLOCK SIGNAL GATING
- Publication number 20070279117
- Publication date Dec 6, 2007
- International Business Machines Corporation
- Hayden C. Cranford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for high frequency clock signal gating
- Publication number 20070069793
- Publication date Mar 29, 2007
- International Business Machines Corporation
- Hayden C. Cranford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Electronic component value trimming systems
- Publication number 20050127978
- Publication date Jun 16, 2005
- Hayden Clavie Cranford
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Differential SCSI driver rise time and amplitude control circuit
- Publication number 20020175717
- Publication date Nov 28, 2002
- International Business Machines Corporation
- Samuel T. Ray
- H03 - BASIC ELECTRONIC CIRCUITRY

Samuel T. Ray

Person

Patents Grantslast 30 patents

Real-time DC-balance aware AFE offset cancellation

Dual loop voltage regulator utilizing gain and phase shaping

Dual loop voltage regulator utilizing gain and phase shaping

Implementing CML multiplexer load balancing

Method and system for high frequency clock signal gating

Electronic component value trimming systems

Differential SCSI driver rise time and amplitude control circuit

Patents Applicationslast 30 patents

REAL-TIME DC-BALANCE AWARE AFE OFFSET CANCELLATION

DUAL LOOP VOLTAGE REGULATOR UTILIZING GAIN AND PHASE SHAPING

DUAL LOOP VOLTAGE REGULATOR UTILIZING GAIN AND PHASE SHAPING

Implementing CML Multiplexer Load Balancing

METHOD AND SYSTEM FOR HIGH FREQUENCY CLOCK SIGNAL GATING

Method and system for high frequency clock signal gating

Electronic component value trimming systems

Differential SCSI driver rise time and amplitude control circuit