Samy R. Makar

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Fremont, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Transition fault testing of source synchronous interface
- Patent number 9,234,942
- Issue date Jan 12, 2016
- Apple Inc.
- Anuja Banerjee
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus and method for clock glitch detection during at-speed tes...
- Patent number 8,793,545
- Issue date Jul 29, 2014
- Apple Inc.
- Ravi K. Ramaswami
- G01 - MEASURING TESTING
Information Patent Grant
Secure register scan bypass
- Patent number 8,495,443
- Issue date Jul 23, 2013
- Apple Inc.
- Jianlin Yu
- G01 - MEASURING TESTING
Information Patent Grant
Dynamic scan chain grouping
- Patent number 8,301,947
- Issue date Oct 30, 2012
- Apple Inc.
- Samy Makar
- G01 - MEASURING TESTING
Information Patent Grant
Testing replicated sub-systems in a yield-enhancing chip-test envir...
- Patent number 7,263,642
- Issue date Aug 28, 2007
- Azul Systems, Inc.
- Samy R. Makar
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
Apparatus and Method for Controlling Internal Test Controllers
- Publication number 20150046763
- Publication date Feb 12, 2015
- Apple Inc.
- Samy R. Makar
- G01 - MEASURING TESTING
Information Patent Application
Transition Fault Testing of Source Synchronous Interface
- Publication number 20140088912
- Publication date Mar 27, 2014
- Apple Inc.
- Anuja Banerjee
- G01 - MEASURING TESTING
Information Patent Application
Apparatus and Method for Clock Glitch Detection During At-Speed Tes...
- Publication number 20140013173
- Publication date Jan 9, 2014
- Ravi K. Ramaswami
- G01 - MEASURING TESTING
Information Patent Application
FPGA Test Configuration Minimization
- Publication number 20110022907
- Publication date Jan 27, 2011
- StarDFX Technologies, Inc.
- Zhigang Jiang
- G01 - MEASURING TESTING