Sandeep B. Sane

Person

Chandler, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Processor package with universal optical input/output
- Patent number 12,038,858
- Issue date Jul 16, 2024
- Intel Corporation
- Anshuman Thakur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electrical and optical interfaces at different heights along an edg...
- Patent number 11,983,135
- Issue date May 14, 2024
- Intel Corporation
- Dheeraj Subbareddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interconnect architecture with silicon interposer and EMIB
- Patent number 11,901,299
- Issue date Feb 13, 2024
- Intel Corporation
- Md Altaf Hossain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package substrate with reduced interconnect stress
- Patent number 11,824,013
- Issue date Nov 21, 2023
- Intel Corporation
- Lauren A. Link
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect architecture with silicon interposer and EMIB
- Patent number 11,557,541
- Issue date Jan 17, 2023
- Intel Corporation
- Md Altaf Hossain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of utilizing low temperature solder assisted mounting techn...
- Patent number 11,417,592
- Issue date Aug 16, 2022
- Intel Corporation
- Omkar G. Karhade
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming flexure based cooling solutions for package stru...
- Patent number 11,276,625
- Issue date Mar 15, 2022
- Intel Corporation
- Siddarth Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic bond pads having integrated spring structures
- Patent number 10,811,366
- Issue date Oct 20, 2020
- Intel Corporation
- Feras Eid
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Systems and methods for replaceable bail grid array (BGA) packages...
- Patent number 10,531,575
- Issue date Jan 7, 2020
- Intel Corporation
- Sandeep Sane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic bond pads having integrated spring structures
- Patent number 10,325,860
- Issue date Jun 18, 2019
- Intel Corporation
- Feras Eid
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Warpage controlled package and method for same
- Patent number 9,953,934
- Issue date Apr 24, 2018
- Intel Corporation
- Siddarth Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die warpage control for thin die assembly
- Patent number 9,659,899
- Issue date May 23, 2017
- Intel Corporation
- Sandeep B. Sane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Systems and methods for package on package through mold interconnects
- Patent number 9,659,908
- Issue date May 23, 2017
- Intel Corporation
- Shubhada H. Sahasrabudhe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of adding dopants to conductive interconnect structures in...
- Patent number 9,394,619
- Issue date Jul 19, 2016
- Intel Corporation
- Rajen S. Sidhu
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Contact pads for integrated circuit packages
- Patent number 9,368,461
- Issue date Jun 14, 2016
- Intel Corporation
- Sven Albers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Contact pads for integrated circuit packages
- Patent number 9,299,672
- Issue date Mar 29, 2016
- Intel Corporation
- Sven Albers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die warpage control for thin die assembly
- Patent number 9,123,732
- Issue date Sep 1, 2015
- Intel Corporation
- Sandeep B. Sane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Using collapse limiter structures between elements to reduce solder...
- Patent number 8,941,236
- Issue date Jan 27, 2015
- Intel Corporation
- Ameya Limaye
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic package containing silicon connecting region for hi...
- Patent number 8,441,809
- Issue date May 14, 2013
- Intel Corporation
- Ravi Mahajan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Modified chip attach process
- Patent number 8,324,737
- Issue date Dec 4, 2012
- Intel Corporation
- Biju Chandran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic package containing silicon patches for high density...
- Patent number 8,064,224
- Issue date Nov 22, 2011
- Intel Corporation
- Ravi Mahajan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Modified chip attach process
- Patent number 7,901,982
- Issue date Mar 8, 2011
- Intel Corporation
- Sandeep B Sane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming nano-coatings for improved adhesion between firs...
- Patent number 7,781,260
- Issue date Aug 24, 2010
- Intel Corporation
- Sandeep Sane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Modified chip attach process
- Patent number 7,579,213
- Issue date Aug 25, 2009
- Intel Corporation
- Sandeep B Sane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low temperature phase change thermal interface material dam
- Patent number 7,312,527
- Issue date Dec 25, 2007
- Intel Corporation
- Sandeep B. Sane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Modified chip attach process and apparatus
- Patent number 7,304,391
- Issue date Dec 4, 2007
- Intel Corporation
- Sandeep B Sane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for reducing assembly-induced stress in a semiconductor die
- Patent number 7,166,540
- Issue date Jan 23, 2007
- Intel Corporation
- Nitin A. Deshpande
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Modified chip attach process and apparatus
- Patent number 6,919,224
- Issue date Jul 19, 2005
- Intel Corporation
- Sandeep B Sane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Laminate substrate containing fiber optic cables
- Patent number 6,788,859
- Issue date Sep 7, 2004
- International Business Machines Corporation
- Voya R. Markovich
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
OPTICAL FIBER ARRAY WITH OPTICAL PASSTHROUGH
- Publication number 20240264395
- Publication date Aug 8, 2024
- Lightmatter, Inc
- Nicholas C. Harris
- G02 - OPTICS
Information Patent Application
INTERCONNECT ARCHITECTURE WITH SILICON INTERPOSER AND EMIB
- Publication number 20240145395
- Publication date May 2, 2024
- Intel Corporation
- MD Altaf HOSSAIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECT ARCHITECTURE WITH SILICON INTERPOSER AND EMIB
- Publication number 20230107106
- Publication date Apr 6, 2023
- Intel Corporation
- MD Altaf HOSSAIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROCESSOR PACKAGE WITH UNIVERSAL OPTICAL INPUT/OUTPUT
- Publication number 20220114121
- Publication date Apr 14, 2022
- Intel Corporation
- Anshuman THAKUR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ELECTRICAL AND OPTICAL INTERFACES AT DIFFERENT HEIGHTS ALONG AN EDG...
- Publication number 20220100692
- Publication date Mar 31, 2022
- Intel Corporation
- Dheeraj SUBBAREDDY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OFF-PACKAGE HIGH DENSITY, HIGH BANDWIDTH MEMORY ACCESS USING OPTICA...
- Publication number 20220092016
- Publication date Mar 24, 2022
- Intel Corporation
- Mahesh K. KUMASHIKAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS OF UTILIZING LOW TEMPERATURE SOLDER ASSISTED MOUNTING TECHN...
- Publication number 20210287974
- Publication date Sep 16, 2021
- Intel Corporation
- Omkar G. Karhade
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING FLEXURE BASED COOLING SOLUTIONS FOR PACKAGE STRU...
- Publication number 20210280495
- Publication date Sep 9, 2021
- Intel Corporation
- Siddarth Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE SUBSTRATE WITH REDUCED INTERCONNECT STRESS
- Publication number 20210050306
- Publication date Feb 18, 2021
- Intel Corporation
- Lauren A. Link
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECT ARCHITECTURE WITH SILICON INTERPOSER AND EMIB
- Publication number 20200211969
- Publication date Jul 2, 2020
- Intel Corporation
- MD Altaf HOSSAIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGES WITH PLATES
- Publication number 20190279960
- Publication date Sep 12, 2019
- Intel Corporation
- Omkar G. Karhade
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC BOND PADS HAVING INTEGRATED SPRING STRUCTURES
- Publication number 20190148311
- Publication date May 16, 2019
- Intel Corporation
- Feras Eid
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEMS AND METHODS FOR REPLACEABLE BAIL GRID ARRAY (BGA) PACKAGES...
- Publication number 20190037708
- Publication date Jan 31, 2019
- Intel Corporation
- Sandeep SANE
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
MICROELECTRONIC BOND PADS HAVING INTEGRATED SPRING STRUCTURES
- Publication number 20170309578
- Publication date Oct 26, 2017
- Intel Corporation
- Feras Eid
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WARPAGE CONTROLLED PACKAGE AND METHOD FOR SAME
- Publication number 20170178987
- Publication date Jun 22, 2017
- Siddarth Kumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEMS AND METHODS FOR PACKAGE ON PACKAGE THROUGH MOLD INTERCONNECTS
- Publication number 20170133350
- Publication date May 11, 2017
- Intel Corporation
- Shubhada H. Sahasrabudhe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND DEVICES FOR SECURING AND TRANSPORTING SINGULATED DIE IN...
- Publication number 20170032991
- Publication date Feb 2, 2017
- Intel Corporation
- John C. JOHNSON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND DEVICES FOR SECURING AND TRANSPORTING SINGULATED DIE IN...
- Publication number 20160172222
- Publication date Jun 16, 2016
- Intel Corporation
- John C. JOHNSON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTACT PADS FOR INTEGRATED CIRCUIT PACKAGES
- Publication number 20150333022
- Publication date Nov 19, 2015
- Sven Albers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE WARPAGE CONTROL FOR THIN DIE ASSEMBLY
- Publication number 20150318258
- Publication date Nov 5, 2015
- Intel Corporation
- SANDEEP B. SANE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND DEVICES FOR SECURING AND TRANSPORTING SINGULATED DIE IN...
- Publication number 20150187622
- Publication date Jul 2, 2015
- John C. JOHNSON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF ADDING DOPANTS TO CONDUCTIVE INTERCONNECT STRUCTURES IN...
- Publication number 20140268534
- Publication date Sep 18, 2014
- Rajen S. Sidhu
- C25 - ELECTROLYTIC OR ELECTROPHORETIC PROCESSES APPARATUS THEREFOR
Information Patent Application
DIE WARPAGE CONTROL FOR THIN DIE ASSEMBLY
- Publication number 20140091470
- Publication date Apr 3, 2014
- Sandeep B. Sane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
USING COLLAPSE LIMITER STRUCTURES BETWEEN ELEMENTS TO REDUCE SOLDER...
- Publication number 20140091456
- Publication date Apr 3, 2014
- Ameya LIMAYE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC PACKAGE CONTAINING SILICON CONNECTING REGION FOR HI...
- Publication number 20110241208
- Publication date Oct 6, 2011
- Ravi Mahajan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
MODIFIED CHIP ATTACH PROCESS
- Publication number 20110156254
- Publication date Jun 30, 2011
- Sandeep B. Sane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MODIFIED CHIP ATTACH PROCESS
- Publication number 20090275175
- Publication date Nov 5, 2009
- Sandeep B. Sane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC PACKAGE CONTAINING SILICON PATCHES FOR HIGH DENSITY...
- Publication number 20090244874
- Publication date Oct 1, 2009
- Ravi Mahajan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Methods of forming nano-coatings for improved adhesion between firs...
- Publication number 20090065932
- Publication date Mar 12, 2009
- Sandeep Sane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Shape memory based mechanical enabling mechanism
- Publication number 20080079129
- Publication date Apr 3, 2008
- Shankar Ganapathysubramanian
- H01 - BASIC ELECTRIC ELEMENTS

Sandeep B. Sane

Person

Patents Grantslast 30 patents

Processor package with universal optical input/output

Electrical and optical interfaces at different heights along an edg...

Interconnect architecture with silicon interposer and EMIB

Package substrate with reduced interconnect stress

Interconnect architecture with silicon interposer and EMIB

Methods of utilizing low temperature solder assisted mounting techn...

Methods of forming flexure based cooling solutions for package stru...

Microelectronic bond pads having integrated spring structures

Systems and methods for replaceable bail grid array (BGA) packages...

Microelectronic bond pads having integrated spring structures

Warpage controlled package and method for same

Die warpage control for thin die assembly

Systems and methods for package on package through mold interconnects

Methods of adding dopants to conductive interconnect structures in...

Contact pads for integrated circuit packages

Contact pads for integrated circuit packages

Die warpage control for thin die assembly

Using collapse limiter structures between elements to reduce solder...

Microelectronic package containing silicon connecting region for hi...

Modified chip attach process

Microelectronic package containing silicon patches for high density...

Modified chip attach process

Methods of forming nano-coatings for improved adhesion between firs...

Modified chip attach process

Low temperature phase change thermal interface material dam

Modified chip attach process and apparatus

Method for reducing assembly-induced stress in a semiconductor die

Modified chip attach process and apparatus

Laminate substrate containing fiber optic cables

Patents Applicationslast 30 patents

OPTICAL FIBER ARRAY WITH OPTICAL PASSTHROUGH

INTERCONNECT ARCHITECTURE WITH SILICON INTERPOSER AND EMIB

INTERCONNECT ARCHITECTURE WITH SILICON INTERPOSER AND EMIB

PROCESSOR PACKAGE WITH UNIVERSAL OPTICAL INPUT/OUTPUT

ELECTRICAL AND OPTICAL INTERFACES AT DIFFERENT HEIGHTS ALONG AN EDG...

OFF-PACKAGE HIGH DENSITY, HIGH BANDWIDTH MEMORY ACCESS USING OPTICA...

METHODS OF UTILIZING LOW TEMPERATURE SOLDER ASSISTED MOUNTING TECHN...

METHODS OF FORMING FLEXURE BASED COOLING SOLUTIONS FOR PACKAGE STRU...

PACKAGE SUBSTRATE WITH REDUCED INTERCONNECT STRESS

INTERCONNECT ARCHITECTURE WITH SILICON INTERPOSER AND EMIB

INTEGRATED CIRCUIT PACKAGES WITH PLATES

MICROELECTRONIC BOND PADS HAVING INTEGRATED SPRING STRUCTURES

SYSTEMS AND METHODS FOR REPLACEABLE BAIL GRID ARRAY (BGA) PACKAGES...

MICROELECTRONIC BOND PADS HAVING INTEGRATED SPRING STRUCTURES

WARPAGE CONTROLLED PACKAGE AND METHOD FOR SAME

SYSTEMS AND METHODS FOR PACKAGE ON PACKAGE THROUGH MOLD INTERCONNECTS

METHODS AND DEVICES FOR SECURING AND TRANSPORTING SINGULATED DIE IN...

METHODS AND DEVICES FOR SECURING AND TRANSPORTING SINGULATED DIE IN...

CONTACT PADS FOR INTEGRATED CIRCUIT PACKAGES

DIE WARPAGE CONTROL FOR THIN DIE ASSEMBLY

METHODS AND DEVICES FOR SECURING AND TRANSPORTING SINGULATED DIE IN...

METHODS OF ADDING DOPANTS TO CONDUCTIVE INTERCONNECT STRUCTURES IN...

DIE WARPAGE CONTROL FOR THIN DIE ASSEMBLY

USING COLLAPSE LIMITER STRUCTURES BETWEEN ELEMENTS TO REDUCE SOLDER...

MICROELECTRONIC PACKAGE CONTAINING SILICON CONNECTING REGION FOR HI...

MODIFIED CHIP ATTACH PROCESS

MODIFIED CHIP ATTACH PROCESS

MICROELECTRONIC PACKAGE CONTAINING SILICON PATCHES FOR HIGH DENSITY...

Methods of forming nano-coatings for improved adhesion between firs...

Shape memory based mechanical enabling mechanism