Sanjay Dabral

Person

Palo Alto, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Link power savings with state retention
- Patent number 10,712,809
- Issue date Jul 14, 2020
- Intel Corporation
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Link power savings with state retention
- Patent number 10,175,744
- Issue date Jan 8, 2019
- Intel Corporation
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamically modulating link width
- Patent number 9,794,349
- Issue date Oct 17, 2017
- Intel Corporation
- Naveen Cherukuri
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Link power savings with state retention
- Patent number 9,588,575
- Issue date Mar 7, 2017
- Intel Corporation
- Naveen Cherukuri
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Dynamically modulating link width
- Patent number 8,914,541
- Issue date Dec 16, 2014
- Intel Corporation
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Link power savings with state retention
- Patent number 8,831,666
- Issue date Sep 9, 2014
- Intel Corporation
- Naveen Cherukuri
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
I/O link with configurable forwarded and derived clocks
- Patent number 8,315,347
- Issue date Nov 20, 2012
- Intel Corporation
- Karthisha S. Canagasaby
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Redundant acknowledgment in loopback entry
- Patent number 8,250,416
- Issue date Aug 21, 2012
- Intel Corporation
- Tim Frodsham
- G01 - MEASURING TESTING
Information Patent Grant
Technique for lane virtualization
- Patent number 8,204,067
- Issue date Jun 19, 2012
- Intel Corporation
- Naveen Cherukuri
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Apparatuses, systems and methods for detecting errors in data strea...
- Patent number 8,195,996
- Issue date Jun 5, 2012
- Intel Corporation
- Timothy Frodsham
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Input/output driver swing control and supply noise rejection
- Patent number 8,143,911
- Issue date Mar 27, 2012
- Intel Corporation
- Zuoguo Wu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Dynamically modulating link width
- Patent number 8,046,488
- Issue date Oct 25, 2011
- Intel Corporation
- Naveen Cherukuri
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and apparatuses to effect a variable-width link
- Patent number 7,957,428
- Issue date Jun 7, 2011
- Intel Corporation
- Maurice B. Steinman
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Providing error correction coding for probed data
- Patent number 7,917,828
- Issue date Mar 29, 2011
- Intel Corporation
- Larry Tate
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit board including stubless signal paths and method of making...
- Patent number 7,907,418
- Issue date Mar 15, 2011
- Intel Corporation
- Pascal Meier
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method for identifying bad lanes and exchanging width capabilities...
- Patent number 7,844,767
- Issue date Nov 30, 2010
- Intel Corporation
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for response determinism by synchronization
- Patent number 7,804,890
- Issue date Sep 28, 2010
- Intel Corporation
- Muraleedhara H. Navada
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Technique to create link determinism
- Patent number 7,747,888
- Issue date Jun 29, 2010
- Intel Corporation
- Tim Frodsham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system, and apparatus for loopback parameter exchange
- Patent number 7,746,795
- Issue date Jun 29, 2010
- Intel Corporation
- Tim Frodsham
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for acknowledgement-based handshake mechanism...
- Patent number 7,711,878
- Issue date May 4, 2010
- Intel Corporation
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Serial link apparatus, method, and system
- Patent number 7,711,939
- Issue date May 4, 2010
- Intel Corporation
- Karthisha S. Canagasaby
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Redundant acknowledgment in loopback entry
- Patent number 7,681,093
- Issue date Mar 16, 2010
- Intel Corporation
- Tim Frodsham
- G01 - MEASURING TESTING
Information Patent Grant
Programmable passive equalizer
- Patent number 7,671,694
- Issue date Mar 2, 2010
- Intel Corporation
- Evelina F Yeung
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit board including stubless signal paths and method of making...
- Patent number 7,649,745
- Issue date Jan 19, 2010
- Intel Corporation
- Pascal Meier
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
I/O link with configurable forwarded and derived clocks
- Patent number 7,636,411
- Issue date Dec 22, 2009
- Intel Corporation
- Karthisha S. Canagasaby
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Error monitoring for serial links
- Patent number 7,617,424
- Issue date Nov 10, 2009
- Intel Corporation
- Timothy Frodsham
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Compliance of master-slave modes for low-level debug of serial links
- Patent number 7,610,522
- Issue date Oct 27, 2009
- Intel Corporation
- Timothy Frodsham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Link power saving state
- Patent number 7,610,500
- Issue date Oct 27, 2009
- Intel Corporation
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Equalizing a transmitter
- Patent number 7,596,174
- Issue date Sep 29, 2009
- Intel Corporation
- Karthisha S. Canagasaby
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit board-to-circuit board connectors having electro-optic modu...
- Patent number 7,525,723
- Issue date Apr 28, 2009
- Intel Corporation
- Sanjay Dabral
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
LINK POWER SAVINGS WITH STATE RETENTION
- Publication number 20190346909
- Publication date Nov 14, 2019
- Intel Corporation
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LINK POWER SAVINGS WITH STATE RETENTION
- Publication number 20170336853
- Publication date Nov 23, 2017
- Intel Corporation
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMICALLY MODULATING LINK WIDTH
- Publication number 20150081921
- Publication date Mar 19, 2015
- Intel Corporation
- Naveen Cherukuri
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LINK POWER SAVINGS WITH STATE RETENTION
- Publication number 20150074440
- Publication date Mar 12, 2015
- Intel Corporation
- NAVEEN CHERUKURI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, SYSTEM, AND APPARATUS FOR LINK LATENCY MANAGEMENT
- Publication number 20140156892
- Publication date Jun 5, 2014
- Tim Frodsham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamically Modulating Link Width
- Publication number 20120011276
- Publication date Jan 12, 2012
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LINK POWER SAVINGS WITH STATE RETENTION
- Publication number 20100330927
- Publication date Dec 30, 2010
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUNDANT ACKNOWLEDGMENT IN LOOPBACK ENTRY
- Publication number 20100103826
- Publication date Apr 29, 2010
- Tim Frodsham
- G01 - MEASURING TESTING
Information Patent Application
I/O Link with configurable forwarded and derived clocks
- Publication number 20100098201
- Publication date Apr 22, 2010
- Karthisha S. Canagasaby
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CIRCUIT BOARD INCLUDING STUBLESS SIGNAL PATHS AND METHOD OF MAKING...
- Publication number 20100073892
- Publication date Mar 25, 2010
- Intel Corporation
- Pascal Meier
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
INPUT/OUTPUT DRIVER SWING CONTROL AND SUPPLY NOISE REJECTION
- Publication number 20090245416
- Publication date Oct 1, 2009
- Zuoguo Wu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Programmable passive equalizer
- Publication number 20080238588
- Publication date Oct 2, 2008
- Evelina F. Yeung
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ERROR MONITORING FOR SERIAL LINKS
- Publication number 20080209306
- Publication date Aug 28, 2008
- Timothy Frodsham
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Providing error correction coding for probed data
- Publication number 20080163034
- Publication date Jul 3, 2008
- Larry Tate
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Circuit Board Including Stubless Signal Paths and Method of Making...
- Publication number 20080123273
- Publication date May 29, 2008
- Intel Corporation
- Pascal Meier
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Testing microelectronic devices using electro-optic modulator probes
- Publication number 20080122463
- Publication date May 29, 2008
- Sanjay Dabral
- G01 - MEASURING TESTING
Information Patent Application
Frequency multiplying delay-locked loop
- Publication number 20080116951
- Publication date May 22, 2008
- Zuoguo Wu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LINK POWER SAVING STATE
- Publication number 20080091963
- Publication date Apr 17, 2008
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LINK POWER SAVING STATE
- Publication number 20080075107
- Publication date Mar 27, 2008
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LINK POWER SAVING STATE
- Publication number 20080077814
- Publication date Mar 27, 2008
- Naveen Cherukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Technique to create link determinism
- Publication number 20080065924
- Publication date Mar 13, 2008
- Tim Frodsham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit board-to-circuit board connectors having electro-optic modu...
- Publication number 20080003842
- Publication date Jan 3, 2008
- Sanjay Dabral
- G02 - OPTICS
Information Patent Application
Redundant acknowledgment in loopback entry
- Publication number 20070264730
- Publication date Nov 15, 2007
- Tim Frodsham
- G01 - MEASURING TESTING
Information Patent Application
Optical debug mechanism
- Publication number 20070237527
- Publication date Oct 11, 2007
- Sanjay Dabral
- G01 - MEASURING TESTING
Information Patent Application
Detection of an in-band reset
- Publication number 20070173215
- Publication date Jul 26, 2007
- Timothy Frodsham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Compliance of master-slave modes for low-level debug of serial links
- Publication number 20070168755
- Publication date Jul 19, 2007
- Timothy Frodsham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Error monitoring for serial links
- Publication number 20070157054
- Publication date Jul 5, 2007
- Timothy Frodsham
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Equalizing a transmitter
- Publication number 20070071083
- Publication date Mar 29, 2007
- Karthisha S. Canagasaby
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and system for response determinism by synchronization
- Publication number 20070041405
- Publication date Feb 22, 2007
- Muraleedhara H. Navada
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Programmable passive equalizer
- Publication number 20070030092
- Publication date Feb 8, 2007
- Evelina F. Yeung
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Sanjay Dabral

Person

Patents Grantslast 30 patents

Link power savings with state retention

Link power savings with state retention

Dynamically modulating link width

Link power savings with state retention

Dynamically modulating link width

Link power savings with state retention

I/O link with configurable forwarded and derived clocks

Redundant acknowledgment in loopback entry

Technique for lane virtualization

Apparatuses, systems and methods for detecting errors in data strea...

Input/output driver swing control and supply noise rejection

Dynamically modulating link width

Methods and apparatuses to effect a variable-width link

Providing error correction coding for probed data

Circuit board including stubless signal paths and method of making...

Method for identifying bad lanes and exchanging width capabilities...

Method and system for response determinism by synchronization

Technique to create link determinism

Method, system, and apparatus for loopback parameter exchange

Method and apparatus for acknowledgement-based handshake mechanism...

Serial link apparatus, method, and system

Redundant acknowledgment in loopback entry

Programmable passive equalizer

Circuit board including stubless signal paths and method of making...

I/O link with configurable forwarded and derived clocks

Error monitoring for serial links

Compliance of master-slave modes for low-level debug of serial links

Link power saving state

Equalizing a transmitter

Circuit board-to-circuit board connectors having electro-optic modu...

Patents Applicationslast 30 patents

LINK POWER SAVINGS WITH STATE RETENTION

LINK POWER SAVINGS WITH STATE RETENTION

DYNAMICALLY MODULATING LINK WIDTH

LINK POWER SAVINGS WITH STATE RETENTION

METHOD, SYSTEM, AND APPARATUS FOR LINK LATENCY MANAGEMENT

Dynamically Modulating Link Width

LINK POWER SAVINGS WITH STATE RETENTION

REDUNDANT ACKNOWLEDGMENT IN LOOPBACK ENTRY

I/O Link with configurable forwarded and derived clocks

CIRCUIT BOARD INCLUDING STUBLESS SIGNAL PATHS AND METHOD OF MAKING...

INPUT/OUTPUT DRIVER SWING CONTROL AND SUPPLY NOISE REJECTION

Programmable passive equalizer

ERROR MONITORING FOR SERIAL LINKS

Providing error correction coding for probed data

Circuit Board Including Stubless Signal Paths and Method of Making...

Testing microelectronic devices using electro-optic modulator probes

Frequency multiplying delay-locked loop

LINK POWER SAVING STATE

LINK POWER SAVING STATE

LINK POWER SAVING STATE

Technique to create link determinism

Circuit board-to-circuit board connectors having electro-optic modu...

Redundant acknowledgment in loopback entry

Optical debug mechanism

Detection of an in-band reset

Compliance of master-slave modes for low-level debug of serial links

Error monitoring for serial links

Equalizing a transmitter

Method and system for response determinism by synchronization

Programmable passive equalizer