Sanjay Subbarao

Person

Irvine, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Block failure protection for zone memory system
- Patent number 12,216,541
- Issue date Feb 4, 2025
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Caching of logical-to-physical mapping information in a memory sub-...
- Patent number 12,130,748
- Issue date Oct 29, 2024
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storing a logical-to-physical mapping in NAND memory
- Patent number 12,124,380
- Issue date Oct 22, 2024
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buffer allocation for reducing block transit penalty
- Patent number 12,079,517
- Issue date Sep 3, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory block programming using defectivity information
- Patent number 12,051,479
- Issue date Jul 30, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-pass data programming in a memory sub-system having multiple...
- Patent number 12,050,809
- Issue date Jul 30, 2024
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Timed data transfer between a host system and a memory sub-system
- Patent number 12,045,168
- Issue date Jul 23, 2024
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple-pass programming of memory cells using temporary parity ge...
- Patent number 12,001,721
- Issue date Jun 4, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual management unit scheme for two-pass programming in a memory...
- Patent number 11,922,011
- Issue date Mar 5, 2024
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Block failure protection for zone memory system
- Patent number 11,914,471
- Issue date Feb 27, 2024
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Just-in-time (JIT) scheduler for memory subsystems
- Patent number 11,868,287
- Issue date Jan 9, 2024
- Micron Technology, Inc.
- Johnny A Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Management of programming mode transitions to accommodate a constan...
- Patent number 11,782,841
- Issue date Oct 10, 2023
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partial execution of a write command from a host system
- Patent number 11,782,643
- Issue date Oct 10, 2023
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storing a logical-to-physical mapping in NAND memory
- Patent number 11,755,495
- Issue date Sep 12, 2023
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Caching of logical-to-physical mapping information in a memory sub-...
- Patent number 11,734,189
- Issue date Aug 22, 2023
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Extending size of memory unit
- Patent number 11,726,703
- Issue date Aug 15, 2023
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Journal scheme for two-pass programming memory devices
- Patent number 11,714,562
- Issue date Aug 1, 2023
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input/output size control between a host system and a memory sub-sy...
- Patent number 11,709,632
- Issue date Jul 25, 2023
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Two-layer code with low parity cost for memory sub-systems
- Patent number 11,676,679
- Issue date Jun 13, 2023
- Micron Technology, Inc.
- Sanjay Subbarao
- G11 - INFORMATION STORAGE
Information Patent Grant
Predictive data transfer based on availability of media units in me...
- Patent number 11,669,272
- Issue date Jun 6, 2023
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logical-to-physical mapping of data groups with data locality
- Patent number 11,640,354
- Issue date May 2, 2023
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic data placement for collision avoidance among concurrent wri...
- Patent number 11,573,742
- Issue date Feb 7, 2023
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Timed data transfer between a host system and a memory sub-system
- Patent number 11,487,666
- Issue date Nov 1, 2022
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Extending size of memory unit
- Patent number 11,409,461
- Issue date Aug 9, 2022
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Management of programming mode transitions to accommodate a constan...
- Patent number 11,294,820
- Issue date Apr 5, 2022
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-device storage system with hosted services on peer storage de...
- Patent number 11,281,601
- Issue date Mar 22, 2022
- Western Digital Technologies, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-pass data programming in a memory sub-system having multiple...
- Patent number 11,269,552
- Issue date Mar 8, 2022
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logical-to-physical mapping of data groups with data locality
- Patent number 11,249,896
- Issue date Feb 15, 2022
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data storage drive rebuild with parity generation offload using pee...
- Patent number 11,243,837
- Issue date Feb 8, 2022
- Western Digital Technologies, Inc.
- Vladislav Bolkhovitin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input/output size control between a host system and a memory sub-sy...
- Patent number 11,204,721
- Issue date Dec 21, 2021
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CACHING OF LOGICAL-TO-PHYSICAL MAPPING INFORMATION IN A MEMORY SUB-...
- Publication number 20250021488
- Publication date Jan 16, 2025
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORING A LOGICAL-TO-PHYSICAL MAPPING IN NAND MEMORY
- Publication number 20250013579
- Publication date Jan 9, 2025
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUFFER ALLOCATION FOR REDUCING BLOCK TRANSIT PENALTY
- Publication number 20240393980
- Publication date Nov 28, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Pass Data Programming in a Memory Sub-System having Multiple...
- Publication number 20240377991
- Publication date Nov 14, 2024
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TIMED DATA TRANSFER BETWEEN A HOST SYSTEM AND A MEMORY SUB-SYSTEM
- Publication number 20240370373
- Publication date Nov 7, 2024
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY BLOCK PROGRAMMING USING DEFECTIVITY INFORMATION
- Publication number 20240347128
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G11 - INFORMATION STORAGE
Information Patent Application
MULTIPLE-PASS PROGRAMMING OF MEMORY CELLS USING TEMPORARY PARITY GE...
- Publication number 20240302999
- Publication date Sep 12, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUAL MANAGEMENT UNIT SCHEME FOR TWO-PASS PROGRAMMING IN A MEMORY...
- Publication number 20240160349
- Publication date May 16, 2024
- MICRON TECHNOLGY, INC.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BLOCK FAILURE PROTECTION FOR ZONE MEMORY SYSTEM
- Publication number 20240152424
- Publication date May 9, 2024
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
JUST-IN-TIME (JIT) SCHEDULER FOR MEMORY SUBSYSTEMS
- Publication number 20240078199
- Publication date Mar 7, 2024
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BLOCK FAILURE PROTECTION FOR ZONE MEMORY SYSTEM
- Publication number 20240070020
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE-PASS PROGRAMMING OF MEMORY CELLS USING TEMPORARY PARITY GE...
- Publication number 20240045616
- Publication date Feb 8, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Management of Programming Mode Transitions to Accommodate a Constan...
- Publication number 20240037039
- Publication date Feb 1, 2024
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Partial Execution of a Write Command from a Host System
- Publication number 20240036768
- Publication date Feb 1, 2024
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUFFER ALLOCATION FOR REDUCING BLOCK TRANSIT PENALTY
- Publication number 20240028259
- Publication date Jan 25, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY BLOCK PROGRAMMING USING DEFECTIVITY INFORMATION
- Publication number 20240029815
- Publication date Jan 25, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G11 - INFORMATION STORAGE
Information Patent Application
CACHING OF LOGICAL-TO-PHYSICAL MAPPING INFORMATION IN A MEMORY SUB-...
- Publication number 20230367719
- Publication date Nov 16, 2023
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORING A LOGICAL-TO-PHYSICAL MAPPING IN NAND MEMORY
- Publication number 20230359568
- Publication date Nov 9, 2023
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUAL MANAGEMENT UNIT SCHEME FOR TWO-PASS PROGRAMMING IN A MEMORY...
- Publication number 20230061180
- Publication date Mar 2, 2023
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Timed Data Transfer between a Host System and a Memory Sub-System
- Publication number 20230004495
- Publication date Jan 5, 2023
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXTENDING SIZE OF MEMORY UNIT
- Publication number 20220357872
- Publication date Nov 10, 2022
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHING OF LOGICAL-TO-PHYSICAL MAPPING INFORMATION IN A MEMORY SUB-...
- Publication number 20220300432
- Publication date Sep 22, 2022
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORING A LOGICAL-TO-PHYSICAL MAPPING IN NAND MEMORY
- Publication number 20220300431
- Publication date Sep 22, 2022
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Management of Programming Mode Transitions to Accommodate a Constan...
- Publication number 20220300428
- Publication date Sep 22, 2022
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXTENDING SIZE OF MEMORY UNIT
- Publication number 20220261173
- Publication date Aug 18, 2022
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
QOS TRAFFIC CLASS LATENCY MODEL FOR JUST-IN-TIME (JIT) SCHEDULERS
- Publication number 20220197563
- Publication date Jun 23, 2022
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
JUST-IN-TIME (JIT) SCHEDULER FOR MEMORY SUBSYSTEMS
- Publication number 20220197837
- Publication date Jun 23, 2022
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
JOURNAL SCHEME FOR TWO-PASS PROGRAMMING MEMORY DEVICES
- Publication number 20220187999
- Publication date Jun 16, 2022
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Pass Data Programming in a Memory Sub-System having Multiple...
- Publication number 20220171574
- Publication date Jun 2, 2022
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGICAL-TO-PHYSICAL MAPPING OF DATA GROUPS WITH DATA LOCALITY
- Publication number 20220129376
- Publication date Apr 28, 2022
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING

Sanjay Subbarao

Person

Patents Grantslast 30 patents

Block failure protection for zone memory system

Caching of logical-to-physical mapping information in a memory sub-...

Storing a logical-to-physical mapping in NAND memory

Buffer allocation for reducing block transit penalty

Memory block programming using defectivity information

Multi-pass data programming in a memory sub-system having multiple...

Timed data transfer between a host system and a memory sub-system

Multiple-pass programming of memory cells using temporary parity ge...

Virtual management unit scheme for two-pass programming in a memory...

Block failure protection for zone memory system

Just-in-time (JIT) scheduler for memory subsystems

Management of programming mode transitions to accommodate a constan...

Partial execution of a write command from a host system

Storing a logical-to-physical mapping in NAND memory

Caching of logical-to-physical mapping information in a memory sub-...

Extending size of memory unit

Journal scheme for two-pass programming memory devices

Input/output size control between a host system and a memory sub-sy...

Two-layer code with low parity cost for memory sub-systems

Predictive data transfer based on availability of media units in me...

Logical-to-physical mapping of data groups with data locality

Dynamic data placement for collision avoidance among concurrent wri...

Timed data transfer between a host system and a memory sub-system

Extending size of memory unit

Management of programming mode transitions to accommodate a constan...

Multi-device storage system with hosted services on peer storage de...

Multi-pass data programming in a memory sub-system having multiple...

Logical-to-physical mapping of data groups with data locality

Data storage drive rebuild with parity generation offload using pee...

Input/output size control between a host system and a memory sub-sy...

Patents Applicationslast 30 patents

CACHING OF LOGICAL-TO-PHYSICAL MAPPING INFORMATION IN A MEMORY SUB-...

STORING A LOGICAL-TO-PHYSICAL MAPPING IN NAND MEMORY

BUFFER ALLOCATION FOR REDUCING BLOCK TRANSIT PENALTY

Multi-Pass Data Programming in a Memory Sub-System having Multiple...

TIMED DATA TRANSFER BETWEEN A HOST SYSTEM AND A MEMORY SUB-SYSTEM

MEMORY BLOCK PROGRAMMING USING DEFECTIVITY INFORMATION

MULTIPLE-PASS PROGRAMMING OF MEMORY CELLS USING TEMPORARY PARITY GE...

VIRTUAL MANAGEMENT UNIT SCHEME FOR TWO-PASS PROGRAMMING IN A MEMORY...

BLOCK FAILURE PROTECTION FOR ZONE MEMORY SYSTEM

JUST-IN-TIME (JIT) SCHEDULER FOR MEMORY SUBSYSTEMS

BLOCK FAILURE PROTECTION FOR ZONE MEMORY SYSTEM

MULTIPLE-PASS PROGRAMMING OF MEMORY CELLS USING TEMPORARY PARITY GE...

Management of Programming Mode Transitions to Accommodate a Constan...

Partial Execution of a Write Command from a Host System

BUFFER ALLOCATION FOR REDUCING BLOCK TRANSIT PENALTY

MEMORY BLOCK PROGRAMMING USING DEFECTIVITY INFORMATION

CACHING OF LOGICAL-TO-PHYSICAL MAPPING INFORMATION IN A MEMORY SUB-...

STORING A LOGICAL-TO-PHYSICAL MAPPING IN NAND MEMORY

VIRTUAL MANAGEMENT UNIT SCHEME FOR TWO-PASS PROGRAMMING IN A MEMORY...

Timed Data Transfer between a Host System and a Memory Sub-System

EXTENDING SIZE OF MEMORY UNIT

CACHING OF LOGICAL-TO-PHYSICAL MAPPING INFORMATION IN A MEMORY SUB-...

STORING A LOGICAL-TO-PHYSICAL MAPPING IN NAND MEMORY

Management of Programming Mode Transitions to Accommodate a Constan...

EXTENDING SIZE OF MEMORY UNIT

QOS TRAFFIC CLASS LATENCY MODEL FOR JUST-IN-TIME (JIT) SCHEDULERS

JUST-IN-TIME (JIT) SCHEDULER FOR MEMORY SUBSYSTEMS

JOURNAL SCHEME FOR TWO-PASS PROGRAMMING MEMORY DEVICES

Multi-Pass Data Programming in a Memory Sub-System having Multiple...

LOGICAL-TO-PHYSICAL MAPPING OF DATA GROUPS WITH DATA LOCALITY