Sanjay Vishin

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Horizontally-shared cache victims in multiple core processors
- Patent number 8,725,950
- Issue date May 13, 2014
- MIPS Technologies, Inc.
- Sanjay Vishin
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Multithreading microprocessor with optimized thread scheduler for i...
- Patent number 8,151,268
- Issue date Apr 3, 2012
- MIPS Technologies, Inc.
- Darren M. Jones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for global ordering to insure latency independ...
- Patent number 8,037,253
- Issue date Oct 11, 2011
- MIPS Technologies, Inc.
- Thomas A. Petersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for dynamic voltage scaling in a GPS receiver
- Patent number 8,009,090
- Issue date Aug 30, 2011
- SiRF Technology, Inc.
- Sanjay Vishin
- G01 - MEASURING TESTING
Information Patent Grant
Instruction/skid buffers in a multithreading microprocessor that st...
- Patent number 7,853,777
- Issue date Dec 14, 2010
- MIPS Technologies, Inc.
- Darren M. Jones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Horizontally-shared cache victims in multiple core processors
- Patent number 7,774,549
- Issue date Aug 10, 2010
- MIPS Technologies, Inc.
- Sanjay Vishin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Preventing writeback race in multiple core processors
- Patent number 7,769,957
- Issue date Aug 3, 2010
- MIPS Technologies, Inc.
- Sanjay Vishin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Leaky-bucket thread scheduler in a multithreading microprocessor
- Patent number 7,752,627
- Issue date Jul 6, 2010
- MIPS Technologies, Inc.
- Darren M. Jones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Avoiding livelock using a cache manager in multiple core processors
- Patent number 7,739,455
- Issue date Jun 15, 2010
- MIPS Technologies, Inc.
- Sanjay Vishin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multithreaded dynamic voltage-frequency scaling microprocessor
- Patent number 7,721,127
- Issue date May 18, 2010
- MIPS Technologies, Inc.
- Sanjay Vishin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prioritizing thread selection partly based on stall likelihood prov...
- Patent number 7,664,936
- Issue date Feb 16, 2010
- MIPS Technologies, Inc.
- Michael Gottlieb Jensen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multithreading microprocessor with optimized thread scheduler for i...
- Patent number 7,657,891
- Issue date Feb 2, 2010
- MIPS Technologies, Inc.
- Michael Gottlieb Jensen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for global ordering to insure latency independ...
- Patent number 7,644,237
- Issue date Jan 5, 2010
- MIPS Technologies, Inc.
- Thomas A. Petersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Smart memory based synchronization controller for a multi-threaded...
- Patent number 7,594,089
- Issue date Sep 22, 2009
- MIPS Technologies, Inc.
- Sanjay Vishin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low-power memory system with incorporated vector processing
- Patent number 6,311,280
- Issue date Oct 30, 2001
- nBand Communications
- Sanjay Vishin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache flush operation for a stack-based microprocessor
- Patent number 6,219,757
- Issue date Apr 17, 2001
- Sun Microsystems, Inc.
- Sanjay Vishin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cycle-skipping DRAM for power saving
- Patent number 6,178,479
- Issue date Jan 23, 2001
- nBand Communications
- Sanjay Vishin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generation isolation system and method for garbage collection
- Patent number 6,098,089
- Issue date Aug 1, 2000
- Sun Microsystems, Inc.
- James Michael O'Connor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write barrier system and method including pointer-specific instruct...
- Patent number 5,953,736
- Issue date Sep 14, 1999
- Sun Microsystems, Inc.
- James Michael O'Connor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for fast filtering read and write barrier oper...
- Patent number 5,930,807
- Issue date Jul 27, 1999
- Sun Microsystems
- Zahir Ebrahim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bounded-pause time garbage collection system and method including w...
- Patent number 5,873,105
- Issue date Feb 16, 1999
- Sun Microsystems, Inc.
- Marc Tremblay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bounded-pause time garbage collection system and method including w...
- Patent number 5,873,104
- Issue date Feb 16, 1999
- Sun Microsystems, Inc.
- Marc Tremblay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Auxiliary translation lookaside buffer for assisting in accessing d...
- Patent number 5,860,146
- Issue date Jan 12, 1999
- Sun Microsystems, Inc.
- Sanjay Vishin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bounded-pause time garbage collection system and method including r...
- Patent number 5,857,210
- Issue date Jan 5, 1999
- Sun Microsystems, Inc.
- Marc Tremblay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write barrier system and method for trapping garbage collection pag...
- Patent number 5,845,298
- Issue date Dec 1, 1998
- Sun Microsystems, Inc.
- James Michael O'Connor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for solving the stale data problem occurring i...
- Patent number 5,761,722
- Issue date Jun 2, 1998
- Sun Microsystems, Inc.
- Sanjay Vishin
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
HORIZONTALLY-SHARED CACHE VICTIMS IN MULTIPLE CORE PROCESSORS
- Publication number 20110055488
- Publication date Mar 3, 2011
- MIPS Technologies, Inc.
- Sanjay Vishin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR DYNAMIC VOLTAGE SCALING IN A GPS RECEIVER
- Publication number 20100283680
- Publication date Nov 11, 2010
- Sanjay Vishin
- G01 - MEASURING TESTING
Information Patent Application
MULTITHREADING MICROPROCESSOR WITH OPTIMIZED THREAD SCHEDULER FOR I...
- Publication number 20100115244
- Publication date May 6, 2010
- MIPS Technologies, Inc.
- Michael Gottlieb Jensen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Global Ordering to Insure Latency Independ...
- Publication number 20100005247
- Publication date Jan 7, 2010
- MIPS Technologies, Inc.
- Thomas A. Petersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Avoiding Livelock Using A Cache Manager in Multiple Core Processors
- Publication number 20080320230
- Publication date Dec 25, 2008
- MIPS Technologies Inc.
- Sanjay Vishin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Preventing Writeback Race in Multiple Core Processors
- Publication number 20080320232
- Publication date Dec 25, 2008
- MIPS Technologies Inc.
- Sanjay Vishin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HORIZONTALLY-SHARED CACHE VICTIMS IN MULTIPLE CORE PROCESSORS
- Publication number 20080091880
- Publication date Apr 17, 2008
- MIPS Technologies, Inc.
- Sanjay Vishin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multithreaded dynamic voltage-frequency scaling microprocessor
- Publication number 20070234091
- Publication date Oct 4, 2007
- MIPS Technologies, Inc.
- Sanjay Vishin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction/skid buffers in a multithreading microprocessor
- Publication number 20060179274
- Publication date Aug 10, 2006
- MIPS Technologies, Inc.
- Darren M. Jones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Leaky-bucket thread scheduler in a multithreading microprocessor
- Publication number 20060179439
- Publication date Aug 10, 2006
- MIPS Technologies, Inc.
- Darren M. Jones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multithreading processor including thread scheduler based on instru...
- Publication number 20060179280
- Publication date Aug 10, 2006
- MIPS Technologies, Inc.
- Michael Gottlieb Jensen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multithreading microprocessor with optimized thread scheduler for i...
- Publication number 20060179284
- Publication date Aug 10, 2006
- MIPS Technologies, Inc.
- Michael Gottlieb Jensen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Smart memory based synchronization controller for a multi-threaded...
- Publication number 20050251639
- Publication date Nov 10, 2005
- MIPS Technologies, Inc. A Delaware Corporation
- Sanjay Vishin
- G06 - COMPUTING CALCULATING COUNTING

Sanjay Vishin

Person

Patents Grantslast 30 patents

Horizontally-shared cache victims in multiple core processors

Multithreading microprocessor with optimized thread scheduler for i...

Method and apparatus for global ordering to insure latency independ...

System and method for dynamic voltage scaling in a GPS receiver

Instruction/skid buffers in a multithreading microprocessor that st...

Horizontally-shared cache victims in multiple core processors

Preventing writeback race in multiple core processors

Leaky-bucket thread scheduler in a multithreading microprocessor

Avoiding livelock using a cache manager in multiple core processors

Multithreaded dynamic voltage-frequency scaling microprocessor

Prioritizing thread selection partly based on stall likelihood prov...

Multithreading microprocessor with optimized thread scheduler for i...

Method and apparatus for global ordering to insure latency independ...

Smart memory based synchronization controller for a multi-threaded...

Low-power memory system with incorporated vector processing

Cache flush operation for a stack-based microprocessor

Cycle-skipping DRAM for power saving

Generation isolation system and method for garbage collection

Write barrier system and method including pointer-specific instruct...

Apparatus and method for fast filtering read and write barrier oper...

Bounded-pause time garbage collection system and method including w...

Bounded-pause time garbage collection system and method including w...

Auxiliary translation lookaside buffer for assisting in accessing d...

Bounded-pause time garbage collection system and method including r...

Write barrier system and method for trapping garbage collection pag...

Method and apparatus for solving the stale data problem occurring i...

Patents Applicationslast 30 patents

HORIZONTALLY-SHARED CACHE VICTIMS IN MULTIPLE CORE PROCESSORS

SYSTEM AND METHOD FOR DYNAMIC VOLTAGE SCALING IN A GPS RECEIVER

MULTITHREADING MICROPROCESSOR WITH OPTIMIZED THREAD SCHEDULER FOR I...

Method and Apparatus for Global Ordering to Insure Latency Independ...

Avoiding Livelock Using A Cache Manager in Multiple Core Processors

Preventing Writeback Race in Multiple Core Processors

HORIZONTALLY-SHARED CACHE VICTIMS IN MULTIPLE CORE PROCESSORS

Multithreaded dynamic voltage-frequency scaling microprocessor

Instruction/skid buffers in a multithreading microprocessor

Leaky-bucket thread scheduler in a multithreading microprocessor

Multithreading processor including thread scheduler based on instru...

Multithreading microprocessor with optimized thread scheduler for i...

Smart memory based synchronization controller for a multi-threaded...