Santosh Ghosh

Person

Hillsboro, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Low latency post-quantum signature verification for fast secure-boot
- Patent number 12,137,169
- Issue date Nov 5, 2024
- Intel Corporation
- Santosh Ghosh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Enhancement of trustworthiness of artificial intelligence systems t...
- Patent number 12,124,616
- Issue date Oct 22, 2024
- Intel Corporation
- Claire Vishik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient post-quantum secure software updates tailored to resource...
- Patent number 12,120,227
- Issue date Oct 15, 2024
- Intel Corporation
- Santosh Ghosh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Instructions for accelerating Keccak execution in a processor
- Patent number 12,086,596
- Issue date Sep 10, 2024
- Intel Corporation
- Christoph Dobraunig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low overhead side channel protection for number theoretic transform
- Patent number 12,058,261
- Issue date Aug 6, 2024
- Intel Corporation
- Santosh Ghosh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Cryptographic isolation of memory compartments in a computing envir...
- Patent number 12,050,701
- Issue date Jul 30, 2024
- Intel Corporation
- Michael E. Kounavis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital signature verification engine for reconfigurable circuit de...
- Patent number 12,047,514
- Issue date Jul 23, 2024
- Intel Corporation
- Santosh Ghosh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transient side-channel aware architecture for cryptographic computing
- Patent number 12,032,486
- Issue date Jul 9, 2024
- Intel Corporation
- Abhishek Basak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Accelerating four-way parallel KECCAK execution on 256-bit vector p...
- Patent number 12,026,516
- Issue date Jul 2, 2024
- Intel Corporation
- Santosh Ghosh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low-latency digital signature processing with side-channel security
- Patent number 11,995,184
- Issue date May 28, 2024
- Intel Corporation
- Santosh Ghosh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient quantum-attack resistant functional-safe building block f...
- Patent number 11,985,226
- Issue date May 14, 2024
- Intel Corporation
- Santosh Ghosh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Object and cacheline granularity cryptographic memory integrity
- Patent number 11,954,045
- Issue date Apr 9, 2024
- Intel Corporation
- David M. Durham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technology to provide fault tolerance for elliptic curve digital si...
- Patent number 11,940,888
- Issue date Mar 26, 2024
- Intel Corporation
- Santosh Ghosh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combined SHA2 and SHA3 based XMSS hardware accelerator
- Patent number 11,917,053
- Issue date Feb 27, 2024
- Intel Corporation
- Santosh Ghosh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Functionally safe encryption for vehicle to anything communication
- Patent number 11,909,857
- Issue date Feb 20, 2024
- Intel Corporation
- Santosh Ghosh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Bus-off attack prevention circuit
- Patent number 11,863,569
- Issue date Jan 2, 2024
- Intel Corporation
- Marcio Rogerio Juliato
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Permutation cipher encryption for processor-accelerator memory mapp...
- Patent number 11,838,411
- Issue date Dec 5, 2023
- Intel Corporation
- Santosh Ghosh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
MTS-based mutual-authenticated remote attestation
- Patent number 11,792,191
- Issue date Oct 17, 2023
- Intel Corporation
- Xiruo Liu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Polynomial multiplication for side-channel protection in cryptography
- Patent number 11,792,004
- Issue date Oct 17, 2023
- Intel Corporation
- Santosh Ghosh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor hardware and instructions for lattice based cryptography
- Patent number 11,792,005
- Issue date Oct 17, 2023
- Intel Corporation
- Santosh Ghosh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Homomorphic encryption for machine learning and neural networks usi...
- Patent number 11,777,707
- Issue date Oct 3, 2023
- Intel Corporation
- Santosh Ghosh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Odd index precomputation for authentication path computation
- Patent number 11,770,262
- Issue date Sep 26, 2023
- Intel Corporation
- Rafael Misoczki
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Accelerators for post-quantum cryptography secure hash-based signin...
- Patent number 11,770,258
- Issue date Sep 26, 2023
- Intel Corporation
- Vikram Suresh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Message index aware multi-hash accelerator for post quantum cryptog...
- Patent number 11,750,402
- Issue date Sep 5, 2023
- Intel Corporation
- Vikram Suresh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
State synchronization for post-quantum signing facilities
- Patent number 11,722,313
- Issue date Aug 8, 2023
- Intel Corporation
- Rafael Misoczki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Collision-free hashing for accessing cryptographic computing metada...
- Patent number 11,704,297
- Issue date Jul 18, 2023
- Intel Corporation
- Michael E. Kounavis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Lightweight cryptographic engine
- Patent number 11,615,716
- Issue date Mar 28, 2023
- Intel Corporation
- Santosh Ghosh
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Implicit integrity for cryptographic computing
- Patent number 11,580,234
- Issue date Feb 14, 2023
- Intel Corporation
- Michael E. Kounavis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cryptographic computing engine for memory load and store units of a...
- Patent number 11,575,504
- Issue date Feb 7, 2023
- Intel Corporation
- David M. Durham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast XMSS signature verification and nonce sampling process without...
- Patent number 11,575,521
- Issue date Feb 7, 2023
- Intel Corporation
- Rafael Misoczki
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
HARDWARE-BASED CRYPTOGRAPHIC PROTECTION OF TOKENS
- Publication number 20250005205
- Publication date Jan 2, 2025
- Intel Corporation
- Iwan Grau
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS TO REDUCE PERFORMANCE OVERHEAD ASSOCIATED WITH...
- Publication number 20250007693
- Publication date Jan 2, 2025
- Intel Corporation
- Santosh GHOSH
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
KECCAK ROUND INSTRUCTION AND SUPPORT
- Publication number 20250007694
- Publication date Jan 2, 2025
- Santosh GHOSH
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
KECCAK EXECUTION RESILIENT TO PHYSICAL SIDE-CHANNEL ATTACKS
- Publication number 20250005208
- Publication date Jan 2, 2025
- Intel Corporation
- Dumitru-Daniel DINU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUITRY AND METHODS FOR IMPLEMENTING ONE OR MORE KECCAK INSTRUCTI...
- Publication number 20250004770
- Publication date Jan 2, 2025
- Intel Corporation
- Santosh Ghosh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUITRY AND METHODS FOR ATTENUATION AND OBFUSCATION FOR MITIGATIN...
- Publication number 20250005209
- Publication date Jan 2, 2025
- Intel Corporation
- Debayan Das
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HASHING ENGINE CIRCUITRY AND METHODS FOR A SPHINCS DIGITAL SIGNATUR...
- Publication number 20250007727
- Publication date Jan 2, 2025
- Intel Corporation
- Santosh Ghosh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
INSTRUCTIONS FOR ACCELERATING KECCAK EXECUTION IN A PROCESSOR
- Publication number 20240264837
- Publication date Aug 8, 2024
- Intel Corporation
- Christoph Dobraunig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Post-Quantum Cryptography Key Encapsulation Mechanism System
- Publication number 20240267212
- Publication date Aug 8, 2024
- Intel Corporation
- Santosh Ghosh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Quantum Attack Resistant Advanced Encryption Standard (AES) Encryption
- Publication number 20240259182
- Publication date Aug 1, 2024
- Intel Corporation
- Santosh Ghosh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
COMBINED PROTECTION OF SYMMETRIC-KEY PRIMITIVES AGAINST SIDE-CHANNE...
- Publication number 20240220640
- Publication date Jul 4, 2024
- Intel Corporation
- Daniël Kuijsters
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POST-QUANTUM CRYPTOGRAPHY SIGNATURE VERIFICATION
- Publication number 20240223381
- Publication date Jul 4, 2024
- Intel Corporation
- Alan Hwang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ACCELERATING KECCAK ALGORITHMS
- Publication number 20240211253
- Publication date Jun 27, 2024
- Intel Corporation
- Santosh Ghosh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCELERATING FOUR-WAY PARALLEL KECCAK EXECUTION ON 256-BIT VECTOR P...
- Publication number 20240211261
- Publication date Jun 27, 2024
- Intel Corporation
- Santosh Ghosh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCELERATING EIGHT-WAY PARALLEL KECCAK EXECUTION
- Publication number 20240211268
- Publication date Jun 27, 2024
- Intel Corporation
- Santosh Ghosh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUS-OFF ATTACK PREVENTION CIRCUIT
- Publication number 20240179160
- Publication date May 30, 2024
- Intel Corporation
- Marcio Rogerio Juliato
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
POST-QUANTUM LATTICE-BASED SIGNATURE LATENCY REDUCTION
- Publication number 20240113888
- Publication date Apr 4, 2024
- Intel Corporation
- ZACHARY PEPIN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TEMPORAL INFORMATION LEAKAGE PROTECTION MECHANISM FOR CRYPTOGRAPHIC...
- Publication number 20240104027
- Publication date Mar 28, 2024
- Intel Corporation
- Santosh Ghosh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT SIDE CHANNEL PROTECTION FOR LIGHTWEIGHT AUTHENTICATED ENC...
- Publication number 20240106628
- Publication date Mar 28, 2024
- Intel Corporation
- Santosh Ghosh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
EFFICIENT LOW-OVERHEAD SIDE-CHANNEL PROTECTION FOR POLYNOMIAL MULTI...
- Publication number 20240031140
- Publication date Jan 25, 2024
- Intel Corporation
- ANDREA BASSO
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LIGHTWEIGHT SIDE-CHANNEL PROTECTION FOR POLYNOMIAL MULTIPLICATION I...
- Publication number 20240031127
- Publication date Jan 25, 2024
- Intel Corporation
- ANDREA BASSO
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
HYBRIDIZATION OF DILITHIUM AND FALCON FOR DIGITAL SIGNATURES
- Publication number 20240031164
- Publication date Jan 25, 2024
- Intel Corporation
- Santosh Ghosh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Apparatus, Device, Method, and Computer Program for Determining an...
- Publication number 20240031168
- Publication date Jan 25, 2024
- Yingchen WANG
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MESSAGE AUTHENTICATION GALOIS INTEGRITY AND CORRECTION (MAGIC) FOR...
- Publication number 20230402077
- Publication date Dec 14, 2023
- Intel Corporation
- Sergej Deutsch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus, Device, and Method for a Memory Controller, Memory Contr...
- Publication number 20230400996
- Publication date Dec 14, 2023
- Intel Corporation
- Sergej DEUTSCH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR HARDWARE AND INSTRUCTIONS FOR VECTORIZED FUSED AND-XOR
- Publication number 20230305846
- Publication date Sep 28, 2023
- Intel Corporation
- Andrew H. Reinders
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROTECTION OF AUTHENTICATION TAG COMPUTATION AGAINST POWER AND ELEC...
- Publication number 20230185905
- Publication date Jun 15, 2023
- Intel Corporation
- Santosh Ghosh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERMUTATION CIPHER ENCRYPTION FOR PROCESSOR-ACCELERATOR MEMORY MAPP...
- Publication number 20230117518
- Publication date Apr 20, 2023
- Intel Corporation
- Santosh Ghosh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MODULUS REDUCTION FOR CRYPTOGRAPHY
- Publication number 20230087297
- Publication date Mar 23, 2023
- Intel Corporation
- Santosh Ghosh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
POLYNOMIAL MULTIPLICATION FOR SIDE-CHANNEL PROTECTION IN CRYPTOGRAPHY
- Publication number 20230091951
- Publication date Mar 23, 2023
- Intel Corporation
- Santosh Ghosh
- G06 - COMPUTING CALCULATING COUNTING

Santosh Ghosh

Person

Patents Grantslast 30 patents

Low latency post-quantum signature verification for fast secure-boot

Enhancement of trustworthiness of artificial intelligence systems t...

Efficient post-quantum secure software updates tailored to resource...

Instructions for accelerating Keccak execution in a processor

Low overhead side channel protection for number theoretic transform

Cryptographic isolation of memory compartments in a computing envir...

Digital signature verification engine for reconfigurable circuit de...

Transient side-channel aware architecture for cryptographic computing

Accelerating four-way parallel KECCAK execution on 256-bit vector p...

Low-latency digital signature processing with side-channel security

Efficient quantum-attack resistant functional-safe building block f...

Object and cacheline granularity cryptographic memory integrity

Technology to provide fault tolerance for elliptic curve digital si...

Combined SHA2 and SHA3 based XMSS hardware accelerator

Functionally safe encryption for vehicle to anything communication

Bus-off attack prevention circuit

Permutation cipher encryption for processor-accelerator memory mapp...

MTS-based mutual-authenticated remote attestation

Polynomial multiplication for side-channel protection in cryptography

Processor hardware and instructions for lattice based cryptography

Homomorphic encryption for machine learning and neural networks usi...

Odd index precomputation for authentication path computation

Accelerators for post-quantum cryptography secure hash-based signin...

Message index aware multi-hash accelerator for post quantum cryptog...

State synchronization for post-quantum signing facilities

Collision-free hashing for accessing cryptographic computing metada...

Lightweight cryptographic engine

Implicit integrity for cryptographic computing

Cryptographic computing engine for memory load and store units of a...

Fast XMSS signature verification and nonce sampling process without...

Patents Applicationslast 30 patents

HARDWARE-BASED CRYPTOGRAPHIC PROTECTION OF TOKENS

METHOD AND APPARATUS TO REDUCE PERFORMANCE OVERHEAD ASSOCIATED WITH...

KECCAK ROUND INSTRUCTION AND SUPPORT

KECCAK EXECUTION RESILIENT TO PHYSICAL SIDE-CHANNEL ATTACKS

CIRCUITRY AND METHODS FOR IMPLEMENTING ONE OR MORE KECCAK INSTRUCTI...

CIRCUITRY AND METHODS FOR ATTENUATION AND OBFUSCATION FOR MITIGATIN...

HASHING ENGINE CIRCUITRY AND METHODS FOR A SPHINCS DIGITAL SIGNATUR...

INSTRUCTIONS FOR ACCELERATING KECCAK EXECUTION IN A PROCESSOR

Post-Quantum Cryptography Key Encapsulation Mechanism System

Quantum Attack Resistant Advanced Encryption Standard (AES) Encryption

COMBINED PROTECTION OF SYMMETRIC-KEY PRIMITIVES AGAINST SIDE-CHANNE...

POST-QUANTUM CRYPTOGRAPHY SIGNATURE VERIFICATION

ACCELERATING KECCAK ALGORITHMS

ACCELERATING FOUR-WAY PARALLEL KECCAK EXECUTION ON 256-BIT VECTOR P...

ACCELERATING EIGHT-WAY PARALLEL KECCAK EXECUTION

BUS-OFF ATTACK PREVENTION CIRCUIT

POST-QUANTUM LATTICE-BASED SIGNATURE LATENCY REDUCTION

TEMPORAL INFORMATION LEAKAGE PROTECTION MECHANISM FOR CRYPTOGRAPHIC...

EFFICIENT SIDE CHANNEL PROTECTION FOR LIGHTWEIGHT AUTHENTICATED ENC...

EFFICIENT LOW-OVERHEAD SIDE-CHANNEL PROTECTION FOR POLYNOMIAL MULTI...

LIGHTWEIGHT SIDE-CHANNEL PROTECTION FOR POLYNOMIAL MULTIPLICATION I...

HYBRIDIZATION OF DILITHIUM AND FALCON FOR DIGITAL SIGNATURES

Apparatus, Device, Method, and Computer Program for Determining an...

MESSAGE AUTHENTICATION GALOIS INTEGRITY AND CORRECTION (MAGIC) FOR...

Apparatus, Device, and Method for a Memory Controller, Memory Contr...

PROCESSOR HARDWARE AND INSTRUCTIONS FOR VECTORIZED FUSED AND-XOR

PROTECTION OF AUTHENTICATION TAG COMPUTATION AGAINST POWER AND ELEC...

PERMUTATION CIPHER ENCRYPTION FOR PROCESSOR-ACCELERATOR MEMORY MAPP...

MODULUS REDUCTION FOR CRYPTOGRAPHY

POLYNOMIAL MULTIPLICATION FOR SIDE-CHANNEL PROTECTION IN CRYPTOGRAPHY