Sanu K. Mathew

Person

Hillsboro, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Fine-grained bitcoin engine deactivation for yield recovery, perfor...
- Patent number 12,321,218
- Issue date Jun 3, 2025
- Intel Corporation
- Vikram Suresh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for memory and I/O efficient operations on homomorphic...
- Patent number 12,316,735
- Issue date May 27, 2025
- Intel Corporation
- Vikram B. Suresh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instructions and logic to perform floating point and integer operat...
- Patent number 12,217,053
- Issue date Feb 4, 2025
- Intel Corporation
- Himanshu Kaul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instructions and logic to perform floating point and integer operat...
- Patent number 12,141,578
- Issue date Nov 12, 2024
- Intel Corporation
- Himanshu Kaul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency post-quantum signature verification for fast secure-boot
- Patent number 12,137,169
- Issue date Nov 5, 2024
- Intel Corporation
- Santosh Ghosh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Time and frequency domain side-channel leakage suppression using in...
- Patent number 12,047,485
- Issue date Jul 23, 2024
- Intel Corporation
- Raghavan Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instructions and logic to perform floating point and integer operat...
- Patent number 12,039,331
- Issue date Jul 16, 2024
- Intel Corporation
- Himanshu Kaul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combined SHA2 and SHA3 based XMSS hardware accelerator
- Patent number 11,917,053
- Issue date Feb 27, 2024
- Intel Corporation
- Santosh Ghosh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Secure PUF-based device authentication using adversarial challenge...
- Patent number 11,768,966
- Issue date Sep 26, 2023
- Intel Corporation
- Vikram Suresh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Odd index precomputation for authentication path computation
- Patent number 11,770,262
- Issue date Sep 26, 2023
- Intel Corporation
- Rafael Misoczki
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Accelerators for post-quantum cryptography secure hash-based signin...
- Patent number 11,770,258
- Issue date Sep 26, 2023
- Intel Corporation
- Vikram Suresh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Message index aware multi-hash accelerator for post quantum cryptog...
- Patent number 11,750,402
- Issue date Sep 5, 2023
- Intel Corporation
- Vikram Suresh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instructions and logic to perform floating point and integer operat...
- Patent number 11,720,355
- Issue date Aug 8, 2023
- Intel Corporation
- Himanshu Kaul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technology for generating a keystream while combatting side-channel...
- Patent number 11,695,542
- Issue date Jul 4, 2023
- Intel Corporation
- Sudhir Satpathy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and apparatus to parallelize data decompression
- Patent number 11,595,055
- Issue date Feb 28, 2023
- Intel Corporation
- Vinodh Gopal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus to provide memory based physically unclonable...
- Patent number 11,483,167
- Issue date Oct 25, 2022
- Intel Corporation
- Vikram B. Suresh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Unified accelerator for classical and post-quantum digital signatur...
- Patent number 11,456,877
- Issue date Sep 27, 2022
- Intel Corporation
- Sanu Mathew
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Secure PUF-based device authentication using adversarial challenge...
- Patent number 11,455,431
- Issue date Sep 27, 2022
- Intel Corporation
- Vikram Suresh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency post-quantum signature verification for fast secure-boot
- Patent number 11,405,213
- Issue date Aug 2, 2022
- Intel Corporation
- Santosh Ghosh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Instructions and logic to perform floating point and integer operat...
- Patent number 11,360,767
- Issue date Jun 14, 2022
- Intel Corporation
- Himanshu Kaul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combined SHA2 and SHA3 based XMSS hardware accelerator
- Patent number 11,303,429
- Issue date Apr 12, 2022
- Intel Corporation
- Santosh Ghosh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to parallelize data decompression
- Patent number 11,258,459
- Issue date Feb 22, 2022
- Intel Corporation
- Vinodh Gopal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Message index aware multi-hash accelerator for post quantum cryptog...
- Patent number 11,240,039
- Issue date Feb 1, 2022
- Intel Corporation
- Vikram Suresh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Odd index precomputation for authentication path computation
- Patent number 11,223,483
- Issue date Jan 11, 2022
- Intel Corporation
- Rafael Misoczki
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Accelerators for post-quantum cryptography secure hash-based signin...
- Patent number 11,218,320
- Issue date Jan 4, 2022
- Intel Corporation
- Vikram Suresh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Post quantum public key signature operation for reconfigurable circ...
- Patent number 11,205,017
- Issue date Dec 21, 2021
- Intel Corporation
- Vikram Suresh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instructions and logic to perform floating-point and integer operat...
- Patent number 11,169,799
- Issue date Nov 9, 2021
- Intel Corporation
- Himanshu Kaul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for energy efficient decompression using order...
- Patent number 11,126,663
- Issue date Sep 21, 2021
- Intel Corporation
- Sudhir K. Satpathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Unified AES-SMS4—Camellia symmetric key block cipher acceleration
- Patent number 11,121,856
- Issue date Sep 14, 2021
- Intel Corporation
- Sudhir Satpathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physically unclonable function with feed-forward addressing and var...
- Patent number 11,082,241
- Issue date Aug 3, 2021
- Intel Corporation
- Manoj Sachdev
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
TECHNIQUES FOR USE OF MIXED WORD SIZE MULTIPLICATION FOR FULLY HOMO...
- Publication number 20250112757
- Publication date Apr 3, 2025
- Intel Corporation
- Raghavan KUMAR
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ON-DIE KEY GENERATOR FOR FULLY-HOMOMORPHIC ENCRYPTION RELINEARIZATI...
- Publication number 20250112772
- Publication date Apr 3, 2025
- Intel Corporation
- Sachin TANEJA
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
STATIC INSTRUCTION DECOUPLING (SID) FOR DATA MOVEMENT AND COMPUTE
- Publication number 20250110735
- Publication date Apr 3, 2025
- AppaRao CHALLAGUNDLA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UNIFIED SIDE-CHANNEL AND FAULT-INJECTION RESISTANT AES ENGINE
- Publication number 20250112759
- Publication date Apr 3, 2025
- Raghavan KUMAR
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
INSTRUCTIONS AND LOGIC TO PERFORM FLOATING POINT AND INTEGER OPERAT...
- Publication number 20250094170
- Publication date Mar 20, 2025
- Intel Corporation
- Himanshu Kaul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FULLY HOMOMORPHIC ENCRYPTION
- Publication number 20250007687
- Publication date Jan 2, 2025
- Intel Corporation
- Sanu MATHEW
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TECHNIQUES FOR TWIDDLE FACTOR GENERATION FOR NUMBER-THEORETIC- TRAN...
- Publication number 20250005101
- Publication date Jan 2, 2025
- Intel Corporation
- Sachin TANEJA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECONFIGURABLE COMPUTE CIRCUITRY TO PERFORM FULLY HOMOMORPHIC ENCRY...
- Publication number 20250007688
- Publication date Jan 2, 2025
- Intel Corporation
- Raghavan KUMAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR CONTENTION-FREE ROUTING FOR NUMBER-THEORETIC- TRANSF...
- Publication number 20250005100
- Publication date Jan 2, 2025
- Intel Corporation
- Raghavan KUMAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR TWIDDLE FACTOR GENERATION FOR NUMBER-THEORETIC-TRANS...
- Publication number 20250005102
- Publication date Jan 2, 2025
- Intel Corporation
- Sachin TANEJA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIDE-CHANNEL RESISTANT MULTIPLICATIVELY MASKED AES ENGINE WITH ZERO...
- Publication number 20240333471
- Publication date Oct 3, 2024
- Intel Corporation
- Raghavan Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ERROR DETECTION IN CRYPTOGRAPHIC SUBSTITUTION BOX OPERATIONS
- Publication number 20240333472
- Publication date Oct 3, 2024
- Intel Corporation
- Raghavan Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
INSTRUCTIONS AND LOGIC TO PERFORM FLOATING POINT AND INTEGER OPERAT...
- Publication number 20240184572
- Publication date Jun 6, 2024
- Intel Corporation
- Himanshu Kaul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECONFIGURABLE SIDE-CHANNEL RESISTANT DOUBLE-THROUGHPUT AES ACCELER...
- Publication number 20240007266
- Publication date Jan 4, 2024
- Intel Corporation
- Raghavan Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SIDE-CHANNEL RESISTANT BULK AES ENCRYPTION
- Publication number 20240007267
- Publication date Jan 4, 2024
- Intel Corporation
- Raghavan Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
AUTOMATIC ON-DIE FREQUENCY TUNING USING TUNABLE REPLICA CIRCUITS
- Publication number 20230195200
- Publication date Jun 22, 2023
- Intel Corporation
- Vikram B. Suresh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENERGY-EFFICIENT CRYPTOCURRENCY MINING HARDWARE ACCELERATOR WITH SP...
- Publication number 20230195511
- Publication date Jun 22, 2023
- Intel Corporation
- Vikram Suresh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FINE-GRAINED BITCOIN ENGINE DEACTIVATION FOR YIELD RECOVERY, PERFOR...
- Publication number 20230195683
- Publication date Jun 22, 2023
- Intel Corporation
- Vikram Suresh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTIONS AND LOGIC TO PERFORM FLOATING POINT AND INTEGER OPERAT...
- Publication number 20230046506
- Publication date Feb 16, 2023
- Intel Corporation
- Himanshu Kaul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UNIFIED ACCELERATOR FOR CLASSICAL AND POST-QUANTUM DIGITAL SIGNATUR...
- Publication number 20230017447
- Publication date Jan 19, 2023
- Intel Corporation
- Sanu Mathew
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURE PUF-BASED DEVICE AUTHENTICATION USING ADVERSARIAL CHALLENGE...
- Publication number 20230004681
- Publication date Jan 5, 2023
- Intel Corporation
- Vikram Suresh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTIONS AND LOGIC TO PERFORM FLOATING POINT AND INTEGER OPERAT...
- Publication number 20220357945
- Publication date Nov 10, 2022
- Intel Corporation
- Himanshu Kaul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY POST-QUANTUM SIGNATURE VERIFICATION FOR FAST SECURE-BOOT
- Publication number 20220337421
- Publication date Oct 20, 2022
- Intel Corporation
- SANTOSH GHOSH
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHODS AND APPARATUS TO PARALLELIZE DATA DECOMPRESSION
- Publication number 20220224353
- Publication date Jul 14, 2022
- Intel Corporation
- Vinodh Gopal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COMBINED SHA2 AND SHA3 BASED XMSS HARDWARE ACCELERATOR
- Publication number 20220224514
- Publication date Jul 14, 2022
- Intel Corporation
- SANTOSH GHOSH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TIME AND FREQUENCY DOMAIN SIDE-CHANNEL LEAKAGE SUPPRESSION USING IN...
- Publication number 20220200784
- Publication date Jun 23, 2022
- Intel Corporation
- Raghavan Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ODD INDEX PRECOMPUTATION FOR AUTHENTICATION PATH COMPUTATION
- Publication number 20220131706
- Publication date Apr 28, 2022
- Intel Corporation
- RAFAEL MISOCZKI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ACCELERATORS FOR POST-QUANTUM CRYPTOGRAPHY SECURE HASH-BASED SIGNIN...
- Publication number 20220123943
- Publication date Apr 21, 2022
- Intel Corporation
- VIKRAM SURESH
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
POST QUANTUM PUBLIC KEY SIGNATURE OPERATION FOR RECONFIGURABLE CIRC...
- Publication number 20220108039
- Publication date Apr 7, 2022
- Intel Corporation
- Vikram Suresh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
XMSS MANAGEMENT TO ADDRESS RANDOMIZED HASHING AND FEDERAL INFORMATI...
- Publication number 20220109558
- Publication date Apr 7, 2022
- Intel Corporation
- Vikram Suresh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Sanu K. Mathew

Person

Patents Grantslast 30 patents

Fine-grained bitcoin engine deactivation for yield recovery, perfor...

Technologies for memory and I/O efficient operations on homomorphic...

Instructions and logic to perform floating point and integer operat...

Instructions and logic to perform floating point and integer operat...

Low latency post-quantum signature verification for fast secure-boot

Time and frequency domain side-channel leakage suppression using in...

Instructions and logic to perform floating point and integer operat...

Combined SHA2 and SHA3 based XMSS hardware accelerator

Secure PUF-based device authentication using adversarial challenge...

Odd index precomputation for authentication path computation

Accelerators for post-quantum cryptography secure hash-based signin...

Message index aware multi-hash accelerator for post quantum cryptog...

Instructions and logic to perform floating point and integer operat...

Technology for generating a keystream while combatting side-channel...

Methods and apparatus to parallelize data decompression

Method and apparatus to provide memory based physically unclonable...

Unified accelerator for classical and post-quantum digital signatur...

Secure PUF-based device authentication using adversarial challenge...

Low latency post-quantum signature verification for fast secure-boot

Instructions and logic to perform floating point and integer operat...

Combined SHA2 and SHA3 based XMSS hardware accelerator

Methods and apparatus to parallelize data decompression

Message index aware multi-hash accelerator for post quantum cryptog...

Odd index precomputation for authentication path computation

Accelerators for post-quantum cryptography secure hash-based signin...

Post quantum public key signature operation for reconfigurable circ...

Instructions and logic to perform floating-point and integer operat...

Method and apparatus for energy efficient decompression using order...

Unified AES-SMS4—Camellia symmetric key block cipher acceleration

Physically unclonable function with feed-forward addressing and var...

Patents Applicationslast 30 patents

TECHNIQUES FOR USE OF MIXED WORD SIZE MULTIPLICATION FOR FULLY HOMO...

ON-DIE KEY GENERATOR FOR FULLY-HOMOMORPHIC ENCRYPTION RELINEARIZATI...

STATIC INSTRUCTION DECOUPLING (SID) FOR DATA MOVEMENT AND COMPUTE

UNIFIED SIDE-CHANNEL AND FAULT-INJECTION RESISTANT AES ENGINE

INSTRUCTIONS AND LOGIC TO PERFORM FLOATING POINT AND INTEGER OPERAT...

FULLY HOMOMORPHIC ENCRYPTION

TECHNIQUES FOR TWIDDLE FACTOR GENERATION FOR NUMBER-THEORETIC- TRAN...

RECONFIGURABLE COMPUTE CIRCUITRY TO PERFORM FULLY HOMOMORPHIC ENCRY...

TECHNIQUES FOR CONTENTION-FREE ROUTING FOR NUMBER-THEORETIC- TRANSF...

TECHNIQUES FOR TWIDDLE FACTOR GENERATION FOR NUMBER-THEORETIC-TRANS...

SIDE-CHANNEL RESISTANT MULTIPLICATIVELY MASKED AES ENGINE WITH ZERO...

ERROR DETECTION IN CRYPTOGRAPHIC SUBSTITUTION BOX OPERATIONS

INSTRUCTIONS AND LOGIC TO PERFORM FLOATING POINT AND INTEGER OPERAT...

RECONFIGURABLE SIDE-CHANNEL RESISTANT DOUBLE-THROUGHPUT AES ACCELER...

SIDE-CHANNEL RESISTANT BULK AES ENCRYPTION

AUTOMATIC ON-DIE FREQUENCY TUNING USING TUNABLE REPLICA CIRCUITS

ENERGY-EFFICIENT CRYPTOCURRENCY MINING HARDWARE ACCELERATOR WITH SP...

FINE-GRAINED BITCOIN ENGINE DEACTIVATION FOR YIELD RECOVERY, PERFOR...

INSTRUCTIONS AND LOGIC TO PERFORM FLOATING POINT AND INTEGER OPERAT...

UNIFIED ACCELERATOR FOR CLASSICAL AND POST-QUANTUM DIGITAL SIGNATUR...

SECURE PUF-BASED DEVICE AUTHENTICATION USING ADVERSARIAL CHALLENGE...

INSTRUCTIONS AND LOGIC TO PERFORM FLOATING POINT AND INTEGER OPERAT...

LOW LATENCY POST-QUANTUM SIGNATURE VERIFICATION FOR FAST SECURE-BOOT

METHODS AND APPARATUS TO PARALLELIZE DATA DECOMPRESSION

COMBINED SHA2 AND SHA3 BASED XMSS HARDWARE ACCELERATOR

TIME AND FREQUENCY DOMAIN SIDE-CHANNEL LEAKAGE SUPPRESSION USING IN...

ODD INDEX PRECOMPUTATION FOR AUTHENTICATION PATH COMPUTATION

ACCELERATORS FOR POST-QUANTUM CRYPTOGRAPHY SECURE HASH-BASED SIGNIN...

POST QUANTUM PUBLIC KEY SIGNATURE OPERATION FOR RECONFIGURABLE CIRC...

XMSS MANAGEMENT TO ADDRESS RANDOMIZED HASHING AND FEDERAL INFORMATI...