Sarig LIVNE

Person

Schanya, IL

People

Patents Grantslast 30 patents

Information Patent Grant
Technologies for transmit scheduler dynamic configurations
- Patent number 10,951,475
- Issue date Mar 16, 2021
- Intel Corporation
- Sarig Livne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shaping of post-scheduling network pipeline jitter
- Patent number 10,812,402
- Issue date Oct 20, 2020
- Intel Corporation
- Robert Southworth
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Techniques for packet transmit scheduling
- Patent number 10,791,057
- Issue date Sep 29, 2020
- Intel Corporation
- Sarig Livne
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
PACKET TRANSMISSION SCHEDULING
- Publication number 20230061794
- Publication date Mar 2, 2023
- Intel Corporation
- Sarig LIVNE
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
2 LAYER ALPHA BASED BUFFER MANAGEMENT WITH DYNAMIC RED
- Publication number 20230056330
- Publication date Feb 23, 2023
- Intel Corporation
- Sarig LIVNE
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MECHANISM TO IMPLEMENT TIME STAMP-BASED TRANSMISSIONS FROM AN NETWO...
- Publication number 20230050776
- Publication date Feb 16, 2023
- Intel Corporation
- Sarig Livne
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
OPERATIONS TO COPY PORTIONS OF A PACKET
- Publication number 20220303230
- Publication date Sep 22, 2022
- Intel Corporation
- Ping YU
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PACKET TRANSMISSION SCHEDULING FAIRNESS
- Publication number 20220006750
- Publication date Jan 6, 2022
- Intel Corporation
- Sarig LIVNE
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LOAD BALANCING AMONG OUTPUT PORTS
- Publication number 20210328929
- Publication date Oct 21, 2021
- Intel Corporation
- Boris KLEIMAN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TECHNOLOGIES FOR TRANSMIT SCHEDULER DYNAMIC CONFIGURATIONS
- Publication number 20190327132
- Publication date Oct 24, 2019
- Intel Corporation
- Sarig Livne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES TO USE DESCRIPTORS FOR PACKET TRANSMIT SCHEDULING
- Publication number 20190158429
- Publication date May 23, 2019
- Intel Corporation
- Ben-Zion FRIEDMAN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SHAPING OF POST-SCHEDULING NETWORK PIPELINE JITTER
- Publication number 20190140964
- Publication date May 9, 2019
- Robert Southworth
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TECHNIQUES FOR PACKET TRANSMIT SCHEDULING
- Publication number 20190068507
- Publication date Feb 28, 2019
- Intel Corporation
- Sarig LIVNE
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Sarig LIVNE

Person

Patents Grantslast 30 patents

Technologies for transmit scheduler dynamic configurations

Shaping of post-scheduling network pipeline jitter

Techniques for packet transmit scheduling

Patents Applicationslast 30 patents

PACKET TRANSMISSION SCHEDULING

2 LAYER ALPHA BASED BUFFER MANAGEMENT WITH DYNAMIC RED

MECHANISM TO IMPLEMENT TIME STAMP-BASED TRANSMISSIONS FROM AN NETWO...

OPERATIONS TO COPY PORTIONS OF A PACKET

PACKET TRANSMISSION SCHEDULING FAIRNESS

LOAD BALANCING AMONG OUTPUT PORTS

TECHNOLOGIES FOR TRANSMIT SCHEDULER DYNAMIC CONFIGURATIONS

TECHNIQUES TO USE DESCRIPTORS FOR PACKET TRANSMIT SCHEDULING

SHAPING OF POST-SCHEDULING NETWORK PIPELINE JITTER

TECHNIQUES FOR PACKET TRANSMIT SCHEDULING