Satoshi Kuboyama

Person

Tokyo, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Single event upset-tolerant latch circuit and flip-flop circuit
- Patent number 11,115,008
- Issue date Sep 7, 2021
- Japan Aerospace Exploration Agency
- Akifumi Maru
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor device and method of manufacturing semiconductor device
- Patent number 10,164,058
- Issue date Dec 25, 2018
- Fuji Electric Co., Ltd.
- Shuhei Tatemichi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of manufacturing semiconductor device
- Patent number 9,842,912
- Issue date Dec 12, 2017
- Fuji Electric Co., Ltd.
- Shuhei Tatemichi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Single-event effect tolerant latch circuit and flip-flop circuit
- Patent number 7,576,583
- Issue date Aug 18, 2009
- Japan Aerospace Exploration Agency
- Satoshi Kuboyama
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Single-event-effect tolerant SOI-based inverter, NAND element, NOR...
- Patent number 7,504,850
- Issue date Mar 17, 2009
- Japan Aerospace Exploration Agency
- Satoshi Kuboyama
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Inverter, semiconductor logic circuit, static random access memory...
- Patent number 7,332,780
- Issue date Feb 19, 2008
- Japan Aerospace Exploration Agency
- Sumio Matsuda
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device having an SEB voltage suitable for use in space
- Patent number 6,885,063
- Issue date Apr 26, 2005
- Fuji Electric Co., Ltd.
- Saburo Tagami
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SINGLE EVENT UPSET-TOLERANT LATCH CIRCUIT AND FLIP-FLOP CIRCUIT
- Publication number 20210194470
- Publication date Jun 24, 2021
- JAPAN AEROSPACE EXPLORATION AGENCY
- Akifumi MARU
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
- Publication number 20170301764
- Publication date Oct 19, 2017
- Fuji Electric Co., Ltd.
- Shuhei TATEMICHI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Single-event effect tolerant latch circuit and flip-flop circuit
- Publication number 20070132496
- Publication date Jun 14, 2007
- Satoshi Kuboyama
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Single-event-effect tolerant SOI-based inverter, NAND element, NOR...
- Publication number 20070069305
- Publication date Mar 29, 2007
- Satoshi Kuboyama
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Inverter, semiconductor logic circuit, static random access memory...
- Publication number 20040007743
- Publication date Jan 15, 2004
- Sumio Matsuda
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor device
- Publication number 20030218210
- Publication date Nov 27, 2003
- Fuji Electric Co., Ltd.
- Saburo Tagami
- H01 - BASIC ELECTRIC ELEMENTS

Satoshi Kuboyama

Person

Patents Grantslast 30 patents

Single event upset-tolerant latch circuit and flip-flop circuit

Semiconductor device and method of manufacturing semiconductor device

Semiconductor device and method of manufacturing semiconductor device

Single-event effect tolerant latch circuit and flip-flop circuit

Single-event-effect tolerant SOI-based inverter, NAND element, NOR...

Inverter, semiconductor logic circuit, static random access memory...

Semiconductor device having an SEB voltage suitable for use in space

Patents Applicationslast 30 patents

SINGLE EVENT UPSET-TOLERANT LATCH CIRCUIT AND FLIP-FLOP CIRCUIT

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

Single-event effect tolerant latch circuit and flip-flop circuit

Single-event-effect tolerant SOI-based inverter, NAND element, NOR...

Inverter, semiconductor logic circuit, static random access memory...

Semiconductor device