Satoshi MURAOKA

Person

Yokohama, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Storage system and signal transfer method
- Patent number 10,061,720
- Issue date Aug 28, 2018
- Hitachi, Ltd.
- Yasuhiro Ikeda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory module having different types of memory mounted together the...
- Patent number 9,858,181
- Issue date Jan 2, 2018
- Hitachi, Ltd.
- Yutaka Uematsu
- G11 - INFORMATION STORAGE
Information Patent Grant
DRAM having SDRAM interface and flash memory consolidated memory mo...
- Patent number 9,658,783
- Issue date May 23, 2017
- Hitachi, Ltd.
- Satoshi Muraoka
- G11 - INFORMATION STORAGE
Information Patent Grant
Computer system and coupling configuration control method
- Patent number 9,652,421
- Issue date May 16, 2017
- Hitachi, Ltd.
- Satoshi Muraoka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
DRAM with SDRAM interface, and hybrid flash memory module
- Patent number 9,569,144
- Issue date Feb 14, 2017
- Hitachi, Ltd.
- Yutaka Uematsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Data transmission system and semiconductor circuit
- Patent number 8,988,160
- Issue date Mar 24, 2015
- Hitachi, Ltd.
- Yasuhiro Ikeda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Semiconductor apparatus, signal transmission system and signal tran...
- Patent number 8,866,282
- Issue date Oct 21, 2014
- Hitachi, Ltd.
- Yasuhiro Ikeda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Equalizer circuit and printed circuit board
- Patent number 8,860,527
- Issue date Oct 14, 2014
- Hitachi, Ltd.
- Satoshi Muraoka
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Signal transmission system and storage system
- Patent number 8,848,444
- Issue date Sep 30, 2014
- Hitachi, Ltd.
- Yasuhiro Ikeda
- G11 - INFORMATION STORAGE
Information Patent Grant
Test method and interposer used therefor
- Patent number 8,680,881
- Issue date Mar 25, 2014
- Yutaka Uematsu
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor device
- Patent number 8,581,622
- Issue date Nov 12, 2013
- Hitachi, Ltd.
- Yasuhiro Ikeda
- G11 - INFORMATION STORAGE
Information Patent Grant
Output buffer circuit and differential output buffer circuit, and t...
- Patent number 8,324,925
- Issue date Dec 4, 2012
- Hitachi, Ltd.
- Satoshi Muraoka
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Output buffer circuit and differential output buffer circuit, and t...
- Patent number 7,969,197
- Issue date Jun 28, 2011
- Hitachi, Ltd.
- Satoshi Muraoka
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Differential signaling system and method of controlling skew betwee...
- Patent number 7,786,751
- Issue date Aug 31, 2010
- Hitachi Cable, Ltd.
- Norio Chujo
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Output buffer circuit and differential output buffer circuit, and t...
- Patent number 7,692,445
- Issue date Apr 6, 2010
- Hitachi, Ltd.
- Satoshi Muraoka
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Computer system utilizing speculative read requests to cache memory
- Patent number 6,993,633
- Issue date Jan 31, 2006
- Hitachi, Ltd.
- Tadayuki Sakakibara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electronic circuit device having a function of inhibiting resonance...
- Patent number 5,844,762
- Issue date Dec 1, 1998
- Hitachi, Ltd.
- Hideho Yamamura
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
QUANTUM CALCULATOR
- Publication number 20230394348
- Publication date Dec 7, 2023
- Hitachi, Ltd
- Satoru AKIYAMA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORAGE SYSTEM AND SIGNAL TRANSFER METHOD
- Publication number 20170220492
- Publication date Aug 3, 2017
- Hitachi, Ltd
- Yasuhiro IKEDA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTER SYSTEM AND COUPLING CONFIGURATION CONTROL METHOD
- Publication number 20160188511
- Publication date Jun 30, 2016
- Hitachi, Ltd
- Satoshi MURAOKA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MODULE HAVING DIFFERENT TYPES OF MEMORY MOUNTED TOGETHER THE...
- Publication number 20160092351
- Publication date Mar 31, 2016
- Hitachi, Ltd
- Yutaka UEMATSU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRAM with SDRAM Interface, and Hybrid Flash Memory Module
- Publication number 20150355846
- Publication date Dec 10, 2015
- Hitachi, Ltd
- Yutaka UEMATSU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRAM HAVING SDRAM INTERFACE AND FLASH MEMORY CONSOLIDATED MEMORY MO...
- Publication number 20150347032
- Publication date Dec 3, 2015
- Hitachi, Ltd
- Satoshi MURAOKA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CZTS-BASED THIN FILM SOLAR CELL AND METHOD OF PRODUCTION OF SAME
- Publication number 20150059845
- Publication date Mar 5, 2015
- SHOWA SHELL SEKIYU K.K.
- Hiroki Sugimoto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SIGNAL TRANSMISSION SYSTEM AND STORAGE SYSTEM
- Publication number 20140112073
- Publication date Apr 24, 2014
- Hitachi, Ltd
- Yasuhiro Ikeda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20130307582
- Publication date Nov 21, 2013
- Yasuhiro Ikeda
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR APPARATUS, SIGNAL TRANSMISSION SYSTEM AND SIGNAL TRAN...
- Publication number 20130207234
- Publication date Aug 15, 2013
- Hitachi, Ltd.
- Yasuhiro IKEDA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Signal Wiring Board and Signal Transmission Circuit
- Publication number 20120302075
- Publication date Nov 29, 2012
- Hitachi, Ltd
- Satoshi MURAOKA
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
SIGNAL TRANSFER CIRCUIT
- Publication number 20120262885
- Publication date Oct 18, 2012
- Hitachi, Ltd.
- Yasuhiro IKEDA
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Equalizer Circuit and Printed Circuit Board
- Publication number 20120194304
- Publication date Aug 2, 2012
- Hitachi, Ltd
- Satoshi MURAOKA
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DATA TRANSMISSION SYSTEM AND SEMICONDUCTOR CIRCUIT
- Publication number 20120112849
- Publication date May 10, 2012
- Hitachi, Ltd.
- Yasuhiro IKEDA
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TEST METHOD AND INTERPOSER USED THEREFOR
- Publication number 20110234249
- Publication date Sep 29, 2011
- Elpida Memory, Inc.
- Yutaka UEMATSU
- G01 - MEASURING TESTING
Information Patent Application
OUTPUT BUFFER CIRCUIT AND DIFFERENTIAL OUTPUT BUFFER CIRCUIT, AND T...
- Publication number 20110215830
- Publication date Sep 8, 2011
- SATOSHI MURAOKA
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LSI PACKAGE, PRINTED BOARD AND ELECTRONIC DEVICE
- Publication number 20110007487
- Publication date Jan 13, 2011
- Hitachi, Ltd.
- Satoshi MURAOKA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OUTPUT BUFFER CIRCUIT AND DIFFERENTIAL OUTPUT BUFFER CIRCUIT, AND T...
- Publication number 20100219856
- Publication date Sep 2, 2010
- SATOSHI MURAOKA
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
OUTPUT BUFFER CIRCUIT, SIGNAL TRANSMISSION INTERFACE CIRCUIT AND AP...
- Publication number 20090003463
- Publication date Jan 1, 2009
- Satoshi Muraoka
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Output Buffer Circuit and Differential Output Buffer Circuit, and T...
- Publication number 20080265944
- Publication date Oct 30, 2008
- SATOSHI MURAOKA
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIFFERENTIAL SIGNALING SYSTEM AND METHOD OF CONTROLLING SKEW BETWEE...
- Publication number 20080030242
- Publication date Feb 7, 2008
- Norio Chujo
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Satoshi MURAOKA

Person

Patents Grantslast 30 patents

Storage system and signal transfer method

Memory module having different types of memory mounted together the...

DRAM having SDRAM interface and flash memory consolidated memory mo...

Computer system and coupling configuration control method

DRAM with SDRAM interface, and hybrid flash memory module

Data transmission system and semiconductor circuit

Semiconductor apparatus, signal transmission system and signal tran...

Equalizer circuit and printed circuit board

Signal transmission system and storage system

Test method and interposer used therefor

Semiconductor device

Output buffer circuit and differential output buffer circuit, and t...

Output buffer circuit and differential output buffer circuit, and t...

Differential signaling system and method of controlling skew betwee...

Output buffer circuit and differential output buffer circuit, and t...

Computer system utilizing speculative read requests to cache memory

Electronic circuit device having a function of inhibiting resonance...

Patents Applicationslast 30 patents

QUANTUM CALCULATOR

STORAGE SYSTEM AND SIGNAL TRANSFER METHOD

COMPUTER SYSTEM AND COUPLING CONFIGURATION CONTROL METHOD

MEMORY MODULE HAVING DIFFERENT TYPES OF MEMORY MOUNTED TOGETHER THE...

DRAM with SDRAM Interface, and Hybrid Flash Memory Module

DRAM HAVING SDRAM INTERFACE AND FLASH MEMORY CONSOLIDATED MEMORY MO...

CZTS-BASED THIN FILM SOLAR CELL AND METHOD OF PRODUCTION OF SAME

SIGNAL TRANSMISSION SYSTEM AND STORAGE SYSTEM

SEMICONDUCTOR DEVICE

SEMICONDUCTOR APPARATUS, SIGNAL TRANSMISSION SYSTEM AND SIGNAL TRAN...

Signal Wiring Board and Signal Transmission Circuit

SIGNAL TRANSFER CIRCUIT

Equalizer Circuit and Printed Circuit Board

DATA TRANSMISSION SYSTEM AND SEMICONDUCTOR CIRCUIT

TEST METHOD AND INTERPOSER USED THEREFOR

OUTPUT BUFFER CIRCUIT AND DIFFERENTIAL OUTPUT BUFFER CIRCUIT, AND T...

LSI PACKAGE, PRINTED BOARD AND ELECTRONIC DEVICE

OUTPUT BUFFER CIRCUIT AND DIFFERENTIAL OUTPUT BUFFER CIRCUIT, AND T...

OUTPUT BUFFER CIRCUIT, SIGNAL TRANSMISSION INTERFACE CIRCUIT AND AP...

Output Buffer Circuit and Differential Output Buffer Circuit, and T...

DIFFERENTIAL SIGNALING SYSTEM AND METHOD OF CONTROLLING SKEW BETWEE...