Satyanarayana Sahu

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multiple via structure for high performance standard cells
- Patent number 11,133,803
- Issue date Sep 28, 2021
- QUALCOMM Incorporated
- Satyanarayana Sahu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal oxide semiconductor device of an integrated circuit
- Patent number 10,965,289
- Issue date Mar 30, 2021
- QUALCOMM Incorporated
- Satyanarayana Sahu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple via structure for high performance standard cells
- Patent number 10,236,886
- Issue date Mar 19, 2019
- QUALCOMM Incorporated
- Satyanarayana Sahu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Hybrid diffusion standard library cells, and related systems and me...
- Patent number 10,146,900
- Issue date Dec 4, 2018
- QUALCOMM Incorporated
- Satyanarayana Sahu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods to separate power domains in a processing device
- Patent number 9,958,918
- Issue date May 1, 2018
- QUALCOMM Incorporated
- Satyanarayana Sahu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Standard cell architecture for parasitic resistance reduction
- Patent number 9,960,231
- Issue date May 1, 2018
- QUALCOMM Incorporated
- Xiangdong Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hybrid diffusion standard library cells, and related systems and me...
- Patent number 9,886,540
- Issue date Feb 6, 2018
- QUALCOMM Incorporated
- Satyanarayana Sahu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Metal oxide semiconductor cell device architecture with mixed diffu...
- Patent number 9,831,272
- Issue date Nov 28, 2017
- QUALCOMM Incorporated
- Xiangdong Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
V1 and higher layers programmable ECO standard cells
- Patent number 9,640,522
- Issue date May 2, 2017
- QUALCOMM Incorporated
- Satyanarayana Sahu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Standard cell architecture for reduced leakage current and improved...
- Patent number 9,634,026
- Issue date Apr 25, 2017
- QUALCOMM Incorporated
- Satyanarayana Sahu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Source separated cell
- Patent number 9,577,639
- Issue date Feb 21, 2017
- QUALCOMM Incorporated
- Satyanarayana Sahu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Area-efficient metal-programmable pulse latch design
- Patent number 9,564,881
- Issue date Feb 7, 2017
- QUALCOMM Incorporated
- Qi Ye
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multiple split rail standard cell library architecture
- Patent number 9,502,351
- Issue date Nov 22, 2016
- QUALCOMM Incorporated
- Satyanarayana Sahu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit and layout for a high density antenna protection diode
- Patent number 9,490,245
- Issue date Nov 8, 2016
- QUALCOMM Incorporated
- Satyanarayana Sahu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Continuous diffusion configurable standard cell architecture
- Patent number 9,306,570
- Issue date Apr 5, 2016
- QUALCOMM Incorporated
- Satyanarayana Sahu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital circuit design with semi-continuous diffusion standard cell
- Patent number 9,190,405
- Issue date Nov 17, 2015
- QUALCOMM Incorporated
- Xiangdong Chen
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MULTIPLE VIA STRUCTURE FOR HIGH PERFORMANCE STANDARD CELLS
- Publication number 20200266821
- Publication date Aug 20, 2020
- QUALCOMM Incorporated
- Satyanarayana SAHU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTIPLE VIA STRUCTURE FOR HIGH PERFORMANCE STANDARD CELLS
- Publication number 20190173473
- Publication date Jun 6, 2019
- QUALCOMM Incorporated
- Satyanarayana SAHU
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MULTIPLE VIA STRUCTURE FOR HIGH PERFORMANCE STANDARD CELLS
- Publication number 20180183439
- Publication date Jun 28, 2018
- QUALCOMM Incorporated
- Satyanarayana SAHU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STANDARD CELL ARCHITECTURE FOR PARASITIC RESISTANCE REDUCTION
- Publication number 20170365657
- Publication date Dec 21, 2017
- QUALCOMM Incorporated
- Xiangdong CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Systems and Methods to Separate Power Domains in a Processing Device
- Publication number 20170336840
- Publication date Nov 23, 2017
- QUALCOMM Incorporated
- Satyanarayana Sahu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METAL OXIDE SEMICONDUCTOR CELL DEVICE ARCHITECTURE WITH MIXED DIFFU...
- Publication number 20170287933
- Publication date Oct 5, 2017
- QUALCOMM Incorporated
- Xiangdong CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HYBRID DIFFUSION STANDARD LIBRARY CELLS, AND RELATED SYSTEMS AND ME...
- Publication number 20170083653
- Publication date Mar 23, 2017
- QUALCOMM Incorporated
- Satyanarayana Sahu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AREA-EFFICIENT METAL-PROGRAMMABLE PULSE LATCH DESIGN
- Publication number 20160344374
- Publication date Nov 24, 2016
- QUALCOMM Incorporated
- Qi YE
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIGITAL CIRCUIT DESIGN WITH SEMI-CONTINUOUS DIFFUSION STANDARD CELL
- Publication number 20150221639
- Publication date Aug 6, 2015
- QUALCOMM Incorporated
- Xiangdong CHEN
- G06 - COMPUTING CALCULATING COUNTING

Satyanarayana Sahu

Person

Patents Grantslast 30 patents

Multiple via structure for high performance standard cells

Metal oxide semiconductor device of an integrated circuit

Multiple via structure for high performance standard cells

Hybrid diffusion standard library cells, and related systems and me...

Systems and methods to separate power domains in a processing device

Standard cell architecture for parasitic resistance reduction

Hybrid diffusion standard library cells, and related systems and me...

Metal oxide semiconductor cell device architecture with mixed diffu...

V1 and higher layers programmable ECO standard cells

Standard cell architecture for reduced leakage current and improved...

Source separated cell

Area-efficient metal-programmable pulse latch design

Multiple split rail standard cell library architecture

Circuit and layout for a high density antenna protection diode

Continuous diffusion configurable standard cell architecture

Digital circuit design with semi-continuous diffusion standard cell

Patents Applicationslast 30 patents

MULTIPLE VIA STRUCTURE FOR HIGH PERFORMANCE STANDARD CELLS

MULTIPLE VIA STRUCTURE FOR HIGH PERFORMANCE STANDARD CELLS

MULTIPLE VIA STRUCTURE FOR HIGH PERFORMANCE STANDARD CELLS

STANDARD CELL ARCHITECTURE FOR PARASITIC RESISTANCE REDUCTION

Systems and Methods to Separate Power Domains in a Processing Device

METAL OXIDE SEMICONDUCTOR CELL DEVICE ARCHITECTURE WITH MIXED DIFFU...

HYBRID DIFFUSION STANDARD LIBRARY CELLS, AND RELATED SYSTEMS AND ME...

AREA-EFFICIENT METAL-PROGRAMMABLE PULSE LATCH DESIGN

DIGITAL CIRCUIT DESIGN WITH SEMI-CONTINUOUS DIFFUSION STANDARD CELL