Saurabh Adya

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Determining whether speech input is intended for a digital assistant
- Patent number 12,190,873
- Issue date Jan 7, 2025
- Apple Inc.
- Ahmed S. Hussen Abdelaziz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using visual context to improve a virtual assistant
- Patent number 12,073,831
- Issue date Aug 27, 2024
- Apple Inc.
- Saurabh Adya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital assistant reference resolution
- Patent number 12,027,166
- Issue date Jul 2, 2024
- Apple Inc.
- Hong Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for reducing delay on integrated circuits by identifying ca...
- Patent number 10,318,686
- Issue date Jun 11, 2019
- Intel Corporation
- Shounak Dhar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing clock allocation for a system i...
- Patent number 10,303,202
- Issue date May 28, 2019
- Altera Corporation
- Saurabh Adya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for minimizing logic overlap on integrated circuits
- Patent number 10,242,144
- Issue date Mar 26, 2019
- Altera Corporation
- Saurabh Adya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing large scale consensus based clu...
- Patent number 10,162,924
- Issue date Dec 25, 2018
- Altera Corporation
- Love Singhal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sector-based clock routing methods and apparatus
- Patent number 9,922,157
- Issue date Mar 20, 2018
- Altera Corporation
- Carl Ebeling
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatuses for circuit design and optimization
- Patent number 9,280,632
- Issue date Mar 8, 2016
- Synopsys, Inc.
- Saurabh Adya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatuses for circuit design and optimization
- Patent number 8,307,315
- Issue date Nov 6, 2012
- Synopsys, Inc.
- Saurabh Adya
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
USING VISUAL CONTEXT TO IMPROVE A VIRTUAL ASSISTANT
- Publication number 20240371378
- Publication date Nov 7, 2024
- Apple Inc.
- Saurabh ADYA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUAL OBJECT PLACEMENT BASED ON REFERENTIAL EXPRESSIONS
- Publication number 20240144590
- Publication date May 2, 2024
- Alkeshkumar M. PATEL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXTENDED REALITY BASED DIGITAL ASSISTANT INTERACTIONS
- Publication number 20230401795
- Publication date Dec 14, 2023
- Apple Inc.
- Lynn I. STREJA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETERMINING WHETHER SPEECH INPUT IS INTENDED FOR A DIGITAL ASSISTANT
- Publication number 20230368783
- Publication date Nov 16, 2023
- Apple Inc.
- Eric MARCHI
- G10 - MUSICAL INSTRUMENTS ACOUSTICS
Information Patent Application
DETERMINING WHETHER SPEECH INPUT IS INTENDED FOR A DIGITAL ASSISTANT
- Publication number 20230368812
- Publication date Nov 16, 2023
- Apple Inc.
- Eric MARCHI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVELY USING SENSORS FOR CONTEXTUAL DATA
- Publication number 20230199297
- Publication date Jun 22, 2023
- Apple Inc.
- Saurabh ADYA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIGITAL ASSISTANT REFERENCE RESOLUTION
- Publication number 20230046337
- Publication date Feb 16, 2023
- Apple Inc.
- Hong YU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIMODAL ASSISTANT UNDERSTANDING USING ON-SCREEN AND DEVICE CONTEXT
- Publication number 20230042224
- Publication date Feb 9, 2023
- Apple Inc.
- Alkeshkumar PATEL
- G10 - MUSICAL INSTRUMENTS ACOUSTICS
Information Patent Application
METHODS FOR REDUCING DELAY ON INTEGRATED CIRCUITS
- Publication number 20180101624
- Publication date Apr 12, 2018
- Intel Corporation
- Shounak Dhar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit Design and Optimization
- Publication number 20160188774
- Publication date Jun 30, 2016
- Synopsys, Inc.
- Saurabh Adya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and Apparatuses for Circuit Design and Optimization
- Publication number 20130061195
- Publication date Mar 7, 2013
- Saurabh Adya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUSES FOR CIRCUIT DESIGN AND OPTIMIZATION
- Publication number 20100199234
- Publication date Aug 5, 2010
- Saurabh Adya
- G06 - COMPUTING CALCULATING COUNTING

Saurabh Adya

Person

Patents Grantslast 30 patents

Determining whether speech input is intended for a digital assistant

Using visual context to improve a virtual assistant

Digital assistant reference resolution

Methods for reducing delay on integrated circuits by identifying ca...

Method and apparatus for performing clock allocation for a system i...

Methods for minimizing logic overlap on integrated circuits

Method and apparatus for performing large scale consensus based clu...

Sector-based clock routing methods and apparatus

Methods and apparatuses for circuit design and optimization

Methods and apparatuses for circuit design and optimization

Patents Applicationslast 30 patents

USING VISUAL CONTEXT TO IMPROVE A VIRTUAL ASSISTANT

VIRTUAL OBJECT PLACEMENT BASED ON REFERENTIAL EXPRESSIONS

EXTENDED REALITY BASED DIGITAL ASSISTANT INTERACTIONS

DETERMINING WHETHER SPEECH INPUT IS INTENDED FOR A DIGITAL ASSISTANT

DETERMINING WHETHER SPEECH INPUT IS INTENDED FOR A DIGITAL ASSISTANT

SELECTIVELY USING SENSORS FOR CONTEXTUAL DATA

DIGITAL ASSISTANT REFERENCE RESOLUTION

MULTIMODAL ASSISTANT UNDERSTANDING USING ON-SCREEN AND DEVICE CONTEXT

METHODS FOR REDUCING DELAY ON INTEGRATED CIRCUITS

Circuit Design and Optimization

Methods and Apparatuses for Circuit Design and Optimization

METHODS AND APPARATUSES FOR CIRCUIT DESIGN AND OPTIMIZATION