Saurabh D. Chowdhury

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Dallas, TX, US

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Patents Grantslast 30 patents

Information Patent Grant
Etching nitride and anti-reflective coating
- Patent number 7,915,175
- Issue date Mar 29, 2011
- Cypress Semiconductor Corporation
- Saurabh Dutta Chowdhury
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned shallow trench isolation
- Patent number 7,425,489
- Issue date Sep 16, 2008
- Cypress Semiconductor Corporation
- Geethakrishnan Narasimhan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layer gate stack
- Patent number 7,229,929
- Issue date Jun 12, 2007
- Cypress Semiconductor Corporation
- Saurabh Dutta Chowdhury
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
In situ hard mask approach for self-aligned contact etch
- Patent number 7,078,334
- Issue date Jul 18, 2006
- Cypress Semiconductor Corporation
- Saurabh Dutta Chowdhury
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Borderless contact architecture
- Patent number 6,713,831
- Issue date Mar 30, 2004
- Cypress Semiconductor Corp.
- Sharmin Sadoughi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming sub-critical dimension structures in an integrat...
- Patent number 6,620,715
- Issue date Sep 16, 2003
- Cypress Semiconductor Corp.
- Alain P. Blosse
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Multi-layer gate stack
- Publication number 20040110387
- Publication date Jun 10, 2004
- Saurabh Dutta Chowdhury
- H01 - BASIC ELECTRIC ELEMENTS