Saurabh Kumar Tiwary

Person

Berkely, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods for designing intergrated circuits with automatically synth...
- Patent number 8,887,110
- Issue date Nov 11, 2014
- Cadence Design Systems, Inc.
- Radu Zlatanovici
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Waveform based variational static timing analysis
- Patent number 8,782,583
- Issue date Jul 15, 2014
- Cadence Design Systems, Inc.
- Saurabh K. Tiwary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for waveform based variational static timing...
- Patent number 8,375,343
- Issue date Feb 12, 2013
- Cadence Design Systems, Inc.
- Saurabh K. Tiwary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Boolean satisfiability based verification of analog circuits
- Patent number 8,341,567
- Issue date Dec 25, 2012
- Cadence Design Systems, Inc.
- Saurabh K. Tiwary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for waveform based variational static timing...
- Patent number 8,341,572
- Issue date Dec 25, 2012
- Cadence Design Systems, Inc.
- Saurabh K. Tiwary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for waveform based variational static timing...
- Patent number 8,245,165
- Issue date Aug 14, 2012
- Cadence Design Systems, Inc.
- Saurabh K. Tiwary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for high sigma yield estimation
- Patent number 8,219,355
- Issue date Jul 10, 2012
- Cadence Design Systems, Inc.
- Saurabh Tiwary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic synthesis of clock distribution networks
- Patent number 8,205,182
- Issue date Jun 19, 2012
- Cadence Design Systems, Inc.
- Radu Zlatanovici
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for high sigma yield estimation using reduced d...
- Patent number 8,195,427
- Issue date Jun 5, 2012
- Cadence Design Systems, Inc.
- Saurabh Tiwary
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND SYSTEMS FOR HIGH SIGMA YIELD ESTIMATION
- Publication number 20110153271
- Publication date Jun 23, 2011
- Cadence Design Systems, Inc.
- Saurabh Tiwary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND SYSTEMS FOR HIGH SIGMA YIELD ESTIMATION USING REDUCED D...
- Publication number 20110153272
- Publication date Jun 23, 2011
- Cadence Design Systems, Inc.
- Saurabh Tiwary
- G01 - MEASURING TESTING

Saurabh Kumar Tiwary

Person

Patents Grantslast 30 patents

Methods for designing intergrated circuits with automatically synth...

Waveform based variational static timing analysis

Methods and apparatus for waveform based variational static timing...

Boolean satisfiability based verification of analog circuits

Methods and apparatus for waveform based variational static timing...

Methods and apparatus for waveform based variational static timing...

Methods and systems for high sigma yield estimation

Automatic synthesis of clock distribution networks

Methods and systems for high sigma yield estimation using reduced d...

Patents Applicationslast 30 patents

METHODS AND SYSTEMS FOR HIGH SIGMA YIELD ESTIMATION

METHODS AND SYSTEMS FOR HIGH SIGMA YIELD ESTIMATION USING REDUCED D...