Scott G. Nogle

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Pipelined dual port integrated circuit memory
- Patent number 6,078,527
- Issue date Jun 20, 2000
- Motorola, Inc.
- Alan S. Roth
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit having output timing control circuit and method...
- Patent number 6,011,749
- Issue date Jan 4, 2000
- Motorola, Inc.
- Alan S. Roth
- G11 - INFORMATION STORAGE
Information Patent Grant
Comparison circuit utilizing a differential amplifier
- Patent number 5,973,955
- Issue date Oct 26, 1999
- Motorola, Inc.
- Scott G. Nogle
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for amplifying a signal to produce a latched d...
- Patent number 5,943,274
- Issue date Aug 24, 1999
- Motorola, Inc.
- Alan S. Roth
- G11 - INFORMATION STORAGE
Information Patent Grant
Pipelined dual port integrated circuit memory
- Patent number 5,781,480
- Issue date Jul 14, 1998
- Motorola, Inc.
- Scott George Nogle
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit having combined level conversion and logic function
- Patent number 5,623,437
- Issue date Apr 22, 1997
- Motorola, Inc.
- Scott G. Nogle
- G11 - INFORMATION STORAGE
Information Patent Grant
Buffer circuit having variable output impedance
- Patent number 5,606,275
- Issue date Feb 25, 1997
- Motorola, Inc.
- Ali R. Farhang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Address comparison in an inteagrated circuit memory having shared r...
- Patent number 5,572,467
- Issue date Nov 5, 1996
- Motorola, Inc.
- Hamed Ghassemi
- G11 - INFORMATION STORAGE
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Memory with a combined global data line load and multiplexer
- Patent number 5,475,635
- Issue date Dec 12, 1995
- Motorola, Inc.
- Scott G. Nogle
- G11 - INFORMATION STORAGE
Information Patent Grant
GTL compatible BICMOS input stage
- Patent number 5,446,400
- Issue date Aug 29, 1995
- Motorola Inc.
- Scott G. Nogle
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory with compensation for voltage, temperature, and processing v...
- Patent number 5,303,191
- Issue date Apr 12, 1994
- Motorola, Inc.
- John W. Eagan
- G11 - INFORMATION STORAGE
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BICMOS sense circuit for sensing data during a read cycle of a memory
- Patent number 5,229,967
- Issue date Jul 20, 1993
- Scott G. Nogle
- G11 - INFORMATION STORAGE
Information Patent Grant
BICMOS bit line load for a memory with improved reliability and a m...
- Patent number 5,197,032
- Issue date Mar 23, 1993
- Motorola
- Scott G. Nogle
- G11 - INFORMATION STORAGE
Information Patent Grant
BiCMOS bit line load for a memory with improved reliability
- Patent number 5,155,703
- Issue date Oct 13, 1992
- Motorola, Inc.
- Scott G. Nogle
- G11 - INFORMATION STORAGE
Information Patent Grant
Low di/dt BiCMOS output buffer with improved speed
- Patent number 5,155,392
- Issue date Oct 13, 1992
- Motorola, Inc.
- Scott G. Nogle
- G11 - INFORMATION STORAGE
Information Patent Grant
BiCMOS logic circuit with self-boosting immunity and a method therefor
- Patent number 5,140,192
- Issue date Aug 18, 1992
- Motorola, Inc.
- Scott G. Nogle
- G11 - INFORMATION STORAGE
Information Patent Grant
Low di/dt BiCMOS output buffer with improved speed
- Patent number 5,140,191
- Issue date Aug 18, 1992
- Molorola, Inc.
- Scott G. Nogle
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-address transition detection memory with improved access time
- Patent number 4,964,083
- Issue date Oct 16, 1990
- Motorola, Inc.
- Scott G. Nogle
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory using distributed data line loading
- Patent number 4,928,268
- Issue date May 22, 1990
- Motorola, Inc.
- Scott G. Nogle
- G11 - INFORMATION STORAGE
Information Patent Grant
ECL to CMOS translator
- Patent number 4,806,799
- Issue date Feb 21, 1989
- Motorola, Inc.
- Perry H. Pelley
- H03 - BASIC ELECTRONIC CIRCUITRY

Scott G. Nogle

Person

Patents Grantslast 30 patents

Pipelined dual port integrated circuit memory

Integrated circuit having output timing control circuit and method...

Comparison circuit utilizing a differential amplifier

Method and apparatus for amplifying a signal to produce a latched d...

Pipelined dual port integrated circuit memory

Circuit having combined level conversion and logic function

Buffer circuit having variable output impedance

Address comparison in an inteagrated circuit memory having shared r...

Memory with a combined global data line load and multiplexer

GTL compatible BICMOS input stage

Memory with compensation for voltage, temperature, and processing v...

BICMOS sense circuit for sensing data during a read cycle of a memory

BICMOS bit line load for a memory with improved reliability and a m...

BiCMOS bit line load for a memory with improved reliability

Low di/dt BiCMOS output buffer with improved speed

BiCMOS logic circuit with self-boosting immunity and a method therefor

Low di/dt BiCMOS output buffer with improved speed

Non-address transition detection memory with improved access time

Memory using distributed data line loading

ECL to CMOS translator