Scott I. Remington

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory array with RAM and embedded ROM
- Patent number 9,691,495
- Issue date Jun 27, 2017
- NXP USA, INC.
- Jianan Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Write assist circuit and method therefor
- Patent number 9,691,451
- Issue date Jun 27, 2017
- NXP USA, INC.
- Scott Ives Remington
- G11 - INFORMATION STORAGE
Information Patent Grant
High-speed address fault detection using split address ROM
- Patent number 9,490,031
- Issue date Nov 8, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Scott I. Remington
- G11 - INFORMATION STORAGE
Information Patent Grant
Address fault detection circuit
- Patent number 9,263,152
- Issue date Feb 16, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Alexander B. Hoefler
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory having a latching sense amplifier resistant to negative bias...
- Patent number 8,659,322
- Issue date Feb 25, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Alexander B. Hoefler
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and method thereof
- Patent number 7,859,919
- Issue date Dec 28, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Louis A. De La Cruz, II
- G11 - INFORMATION STORAGE
Information Patent Grant
State retaining power gated latch and method therefor
- Patent number 7,791,389
- Issue date Sep 7, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Scott I. Remington
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Word line driver circuit for a static random access memory and meth...
- Patent number 7,085,175
- Issue date Aug 1, 2006
- FREESCALE SEMICONDUCTOR, INC.
- Scott I. Remington
- G11 - INFORMATION STORAGE
Information Patent Grant
Autonomous way specific tag update
- Patent number 6,408,361
- Issue date Jun 18, 2002
- International Business Machines Corporation
- Thomas Albert Petersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Structure and method for improving high speed data rate in a DRAM
- Patent number 4,979,145
- Issue date Dec 18, 1990
- Motorola, Inc.
- Scott Remington
- G11 - INFORMATION STORAGE
Information Patent Grant
Latch-up control for a CMOS memory with a pumped well
- Patent number 4,918,663
- Issue date Apr 17, 1990
- Motorola, Inc.
- Scott I. Remington
- G11 - INFORMATION STORAGE
Information Patent Grant
Row decoder
- Patent number 4,661,724
- Issue date Apr 28, 1987
- Motorola, Inc.
- Scott Remington
- G11 - INFORMATION STORAGE
Information Patent Grant
Row decoder
- Patent number 4,620,299
- Issue date Oct 28, 1986
- Motorola, Inc.
- Scott Remington
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY ARRAY WITH RAM AND EMBEDDED ROM
- Publication number 20160035433
- Publication date Feb 4, 2016
- FREESCALE SEMICONDUCTOR, INC.
- JIANAN YANG
- G11 - INFORMATION STORAGE
Information Patent Application
Address Fault Detection Circuit
- Publication number 20160027529
- Publication date Jan 28, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Alexander B. Hoefler
- G11 - INFORMATION STORAGE
Information Patent Application
High-Speed Address Fault Detection Using Split Address ROM
- Publication number 20150243368
- Publication date Aug 27, 2015
- Scott I. Remington
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY HAVING A LATCHING SENSE AMPLIFIER RESISTANT TO NEGATIVE BIAS...
- Publication number 20120194222
- Publication date Aug 2, 2012
- Alexander B. Hoefler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MEMORY DEVICE AND METHOD THEREOF
- Publication number 20100054051
- Publication date Mar 4, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Louis A. De La Cruz, II
- G11 - INFORMATION STORAGE
Information Patent Application
STATE RETAINING POWER GATED LATCH AND METHOD THEREFOR
- Publication number 20090189664
- Publication date Jul 30, 2009
- Scott I. Remington
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Word line driver circuit for a static random access memory and meth...
- Publication number 20060104107
- Publication date May 18, 2006
- Scott I. Remington
- G11 - INFORMATION STORAGE

Scott I. Remington

Person

Patents Grantslast 30 patents

Memory array with RAM and embedded ROM

Write assist circuit and method therefor

High-speed address fault detection using split address ROM

Address fault detection circuit

Memory having a latching sense amplifier resistant to negative bias...

Memory device and method thereof

State retaining power gated latch and method therefor

Word line driver circuit for a static random access memory and meth...

Autonomous way specific tag update

Structure and method for improving high speed data rate in a DRAM

Latch-up control for a CMOS memory with a pumped well

Row decoder

Row decoder

Patents Applicationslast 30 patents

MEMORY ARRAY WITH RAM AND EMBEDDED ROM

Address Fault Detection Circuit

High-Speed Address Fault Detection Using Split Address ROM

MEMORY HAVING A LATCHING SENSE AMPLIFIER RESISTANT TO NEGATIVE BIAS...

MEMORY DEVICE AND METHOD THEREOF

STATE RETAINING POWER GATED LATCH AND METHOD THEREFOR

Word line driver circuit for a static random access memory and meth...