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Beaverton, OR, US
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Patents Grants
last 30 patents
Information
Patent Grant
Three-dimensional stacked substrate arrangements
Patent number
8,421,225
Issue date
Apr 16, 2013
Intel Corporation
Shriram Ramanathan
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Three-dimensional stacked substrate arrangements
Patent number
8,203,208
Issue date
Jun 19, 2012
Intel Corporation
Shriram Ramanathan
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Three-dimensional stacked substrate arrangements
Patent number
7,973,407
Issue date
Jul 5, 2011
Intel Corporation
Shriram Ramanathan
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Wafer bonding with highly compliant plate having filler material en...
Patent number
7,307,005
Issue date
Dec 11, 2007
Intel Corporation
Mauro J. Kobrinsky
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Deposition of diffusion barrier
Patent number
7,214,605
Issue date
May 8, 2007
Intel Corporation
Shriram Ramanathan
H01 - BASIC ELECTRIC ELEMENTS
Patents Applications
last 30 patents
Information
Patent Application
THREE-DIMENSIONAL STACKED SUBSTRATE ARRANGEMENTS
Publication number
20120280387
Publication date
Nov 8, 2012
Shriram Ramanathan
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
THREE-DIMENSIONAL STACKED SUBSTRATE ARRANGEMENTS
Publication number
20110260319
Publication date
Oct 27, 2011
Shriram Ramanathan
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
Three-dimensional stacked substrate arrangements
Publication number
20090174070
Publication date
Jul 9, 2009
Shriram Ramanathan
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
HIGHLY COMPLIANT PLATE FOR WAFER BONDING
Publication number
20070284409
Publication date
Dec 13, 2007
Mauro Kobrinsky
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
HIGHLY COMPLIANT PLATE FOR WAFER BONDING
Publication number
20070287263
Publication date
Dec 13, 2007
Mauro J. Kobrinsky
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
Highly compliant plate for wafer bonding
Publication number
20060003547
Publication date
Jan 5, 2006
Mauro J. Kobrinsky
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
Highly compliant plate for wafer bonding
Publication number
20060003548
Publication date
Jan 5, 2006
Mauro J. Kobrinsky
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
Deposition of diffusion barrier
Publication number
20050079685
Publication date
Apr 14, 2005
Shriram Ramanathan
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
Three-dimensional stacked substrate arrangements
Publication number
20050003650
Publication date
Jan 6, 2005
Shriram Ramanathan
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
Methods for bonding wafers using a metal interlayer
Publication number
20040262772
Publication date
Dec 30, 2004
Shriram Ramanathan
H01 - BASIC ELECTRIC ELEMENTS