Scott Schaefer

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Refresh rate selection for a memory built-in self-test
- Patent number 12,237,031
- Issue date Feb 25, 2025
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Error detection and classification at a host device
- Patent number 12,237,844
- Issue date Feb 25, 2025
- Micron Technology, Inc.
- Aaron P. Boehm
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Metadata storage at a memory device
- Patent number 12,198,776
- Issue date Jan 14, 2025
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Operational monitoring for memory devices
- Patent number 12,189,974
- Issue date Jan 7, 2025
- Micron Technology, Inc.
- Aaron P. Boehm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Targeted command/address parity low lift
- Patent number 12,189,477
- Issue date Jan 7, 2025
- Aaron P. Boehm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory traffic monitoring
- Patent number 12,165,740
- Issue date Dec 10, 2024
- Micron Technology, Inc.
- Aaron P. Boehm
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory fault notification
- Patent number 12,154,639
- Issue date Nov 26, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Internal error correction for memory devices
- Patent number 12,141,029
- Issue date Nov 12, 2024
- Aaron P. Boehm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error status determination at a memory device
- Patent number 12,141,028
- Issue date Nov 12, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error log indication via error control information
- Patent number 12,079,068
- Issue date Sep 3, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive user defined health indication
- Patent number 12,066,927
- Issue date Aug 20, 2024
- Micron Technology, Inc.
- Aaron P. Boehm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Real time syndrome check
- Patent number 12,066,891
- Issue date Aug 20, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Indicating a status of a memory built-in self-test for multiple mem...
- Patent number 12,051,477
- Issue date Jul 30, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for detecting a state of a bus
- Patent number 12,046,316
- Issue date Jul 23, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Interrupting a memory built-in self-test
- Patent number 12,040,037
- Issue date Jul 16, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Evaluation of memory device health monitoring logic
- Patent number 12,038,806
- Issue date Jul 16, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Monitoring and adjusting access operations at a memory device
- Patent number 12,014,792
- Issue date Jun 18, 2024
- Micron Technology, Inc.
- Mark D. Ingram
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Resource allocation for a memory built-in self-test
- Patent number 12,001,305
- Issue date Jun 4, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bit retiring to mitigate bit errors
- Patent number 11,990,200
- Issue date May 21, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for detecting a state of a bus
- Patent number 11,983,433
- Issue date May 14, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enabling or disabling on-die error-correcting code for a memory bui...
- Patent number 11,984,180
- Issue date May 14, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Temperature monitoring for memory devices
- Patent number 11,977,772
- Issue date May 7, 2024
- Micron Technology, Inc.
- Aaron P. Boehm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Refresh counters in a memory system
- Patent number 11,966,602
- Issue date Apr 23, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Redundancy-based error detection in a memory device
- Patent number 11,960,360
- Issue date Apr 16, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction memory device with fast data access
- Patent number 11,953,988
- Issue date Apr 9, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Life expectancy monitoring for memory devices
- Patent number 11,947,806
- Issue date Apr 2, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing error control information using a register
- Patent number 11,942,966
- Issue date Mar 26, 2024
- Micron Technology, Inc.
- Aaron P. Boehm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reset verification in a memory system
- Patent number 11,928,333
- Issue date Mar 12, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Indicating a status of a memory built-in self-test
- Patent number 11,929,134
- Issue date Mar 12, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Coordinated error protection
- Patent number 11,928,018
- Issue date Mar 12, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
REAL TIME SYNDROME CHECK
- Publication number 20250045157
- Publication date Feb 6, 2025
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR DETECTING A STATE OF A BUS
- Publication number 20240412801
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
ERROR LOG INDICATION VIA ERROR CONTROL INFORMATION
- Publication number 20240403155
- Publication date Dec 5, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVE MODE ERROR CONTROL
- Publication number 20240372566
- Publication date Nov 7, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RESOURCE ALLOCATION FOR A MEMORY BUILT-IN SELF-TEST
- Publication number 20240362134
- Publication date Oct 31, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE HEALTH MONITORING LOGIC
- Publication number 20240345932
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INDICATING A STATUS OF A MEMORY BUILT-IN SELF-TEST FOR MULTIPLE MEM...
- Publication number 20240347125
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
INTERRUPTING A MEMORY BUILT-IN SELF-TEST
- Publication number 20240339170
- Publication date Oct 10, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
EVALUATION OF MEMORY DEVICE HEALTH MONITORING LOGIC
- Publication number 20240320093
- Publication date Sep 26, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR CORRECTION MEMORY DEVICE WITH FAST DATA ACCESS
- Publication number 20240303158
- Publication date Sep 12, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DIE FAULT DETECTION USING A CALIBRATION PIN
- Publication number 20240303157
- Publication date Sep 12, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIFFERENTIAL STROBE FAULT IDENTIFICATION
- Publication number 20240282400
- Publication date Aug 22, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
ENABLING OR DISABLING ON-DIE ERROR-CORRECTING CODE FOR A MEMORY BUI...
- Publication number 20240274216
- Publication date Aug 15, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
BIT RETIRING TO MITIGATE BIT ERRORS
- Publication number 20240265991
- Publication date Aug 8, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR DETECTING A STATE OF A BUS
- Publication number 20240264767
- Publication date Aug 8, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEMPERATURE MONITORING FOR MEMORY DEVICES
- Publication number 20240256187
- Publication date Aug 1, 2024
- Micron Technology, Inc.
- Aaron P. Boehm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING ERROR CONTROL INFORMATION USING A REGISTER
- Publication number 20240250699
- Publication date Jul 25, 2024
- Micron Technology, Inc.
- Aaron P. Boehm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMAND ADDRESS FAULT DETECTION USING A PARITY PIN
- Publication number 20240232008
- Publication date Jul 11, 2024
- Micron Technology, Inc.
- Melissa I. URIBE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COORDINATED ERROR PROTECTION
- Publication number 20240220354
- Publication date Jul 4, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TARGETED COMMAND/ADDRESS PARITY LOW LIFT
- Publication number 20240220360
- Publication date Jul 4, 2024
- Lodestar Licensing Group LLC
- Aaron P. Boehm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUNDANCY-BASED ERROR DETECTION IN A MEMORY DEVICE
- Publication number 20240220361
- Publication date Jul 4, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR INDICATING A WRITE LINK ERROR
- Publication number 20240211343
- Publication date Jun 27, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMMAND VERIFICATION
- Publication number 20240201908
- Publication date Jun 20, 2024
- Lodestar Licensing Group LLC
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND DEVICES FOR ERROR CORRECTION
- Publication number 20240176696
- Publication date May 30, 2024
- Lodestar Licensing Group LLC
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMAND ADDRESS FAULT DETECTION USING A PARITY PIN
- Publication number 20240134744
- Publication date Apr 25, 2024
- Micron Technology, Inc.
- Melissa I. URIBE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INDICATING A STATUS OF A MEMORY BUILT-IN SELF-TEST
- Publication number 20240127902
- Publication date Apr 18, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
ADDRESS VERIFICATION AT A MEMORY DEVICE
- Publication number 20240126447
- Publication date Apr 18, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR DETECTION AND CLASSIFICATION AT A MEMORY DEVICE
- Publication number 20240118961
- Publication date Apr 11, 2024
- Micron Technology, Inc.
- Aaron P. Boehm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR DETECTION AND CLASSIFICATION AT A HOST DEVICE
- Publication number 20240120947
- Publication date Apr 11, 2024
- Micron Technology, Inc.
- Aaron P. Boehm
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COORDINATED ERROR CORRECTION
- Publication number 20240111627
- Publication date Apr 4, 2024
- Lodestar Licensing Group LLC
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING

Scott Schaefer

Person

Patents Grantslast 30 patents

Refresh rate selection for a memory built-in self-test

Error detection and classification at a host device

Metadata storage at a memory device

Operational monitoring for memory devices

Targeted command/address parity low lift

Memory traffic monitoring

Memory fault notification

Internal error correction for memory devices

Error status determination at a memory device

Error log indication via error control information

Adaptive user defined health indication

Real time syndrome check

Indicating a status of a memory built-in self-test for multiple mem...

Techniques for detecting a state of a bus

Interrupting a memory built-in self-test

Evaluation of memory device health monitoring logic

Monitoring and adjusting access operations at a memory device

Resource allocation for a memory built-in self-test

Bit retiring to mitigate bit errors

Techniques for detecting a state of a bus

Enabling or disabling on-die error-correcting code for a memory bui...

Temperature monitoring for memory devices

Refresh counters in a memory system

Redundancy-based error detection in a memory device

Error correction memory device with fast data access

Life expectancy monitoring for memory devices

Managing error control information using a register

Reset verification in a memory system

Indicating a status of a memory built-in self-test

Coordinated error protection

Patents Applicationslast 30 patents

REAL TIME SYNDROME CHECK

TECHNIQUES FOR DETECTING A STATE OF A BUS

ERROR LOG INDICATION VIA ERROR CONTROL INFORMATION

SELECTIVE MODE ERROR CONTROL

RESOURCE ALLOCATION FOR A MEMORY BUILT-IN SELF-TEST

MEMORY DEVICE HEALTH MONITORING LOGIC

INDICATING A STATUS OF A MEMORY BUILT-IN SELF-TEST FOR MULTIPLE MEM...

INTERRUPTING A MEMORY BUILT-IN SELF-TEST

EVALUATION OF MEMORY DEVICE HEALTH MONITORING LOGIC

ERROR CORRECTION MEMORY DEVICE WITH FAST DATA ACCESS

MEMORY DIE FAULT DETECTION USING A CALIBRATION PIN

DIFFERENTIAL STROBE FAULT IDENTIFICATION

ENABLING OR DISABLING ON-DIE ERROR-CORRECTING CODE FOR A MEMORY BUI...

BIT RETIRING TO MITIGATE BIT ERRORS

TECHNIQUES FOR DETECTING A STATE OF A BUS

TEMPERATURE MONITORING FOR MEMORY DEVICES

MANAGING ERROR CONTROL INFORMATION USING A REGISTER

COMMAND ADDRESS FAULT DETECTION USING A PARITY PIN

COORDINATED ERROR PROTECTION

TARGETED COMMAND/ADDRESS PARITY LOW LIFT

REDUNDANCY-BASED ERROR DETECTION IN A MEMORY DEVICE

TECHNIQUES FOR INDICATING A WRITE LINK ERROR

MEMORY COMMAND VERIFICATION

METHODS AND DEVICES FOR ERROR CORRECTION

COMMAND ADDRESS FAULT DETECTION USING A PARITY PIN

INDICATING A STATUS OF A MEMORY BUILT-IN SELF-TEST

ADDRESS VERIFICATION AT A MEMORY DEVICE

ERROR DETECTION AND CLASSIFICATION AT A MEMORY DEVICE

ERROR DETECTION AND CLASSIFICATION AT A HOST DEVICE

COORDINATED ERROR CORRECTION