Scott Sheridan Smith

Person

Scotia, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Electrical interconnect for an integrated circuit package and metho...
- Patent number 10,068,840
- Issue date Sep 4, 2018
- General Electric Company
- Paul Alan McConnelee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrical interconnect for an integrated circuit package and metho...
- Patent number 9,679,837
- Issue date Jun 13, 2017
- General Electric Company
- Paul Alan McConnelee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic packages and methods of making and using the same
- Patent number 9,666,516
- Issue date May 30, 2017
- General Electric Company
- Scott Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrical interconnect for an integrated circuit package and metho...
- Patent number 9,570,376
- Issue date Feb 14, 2017
- General Electric Company
- Arun Virupaksha Gowda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrical interconnect for an integrated circuit package and metho...
- Patent number 9,299,647
- Issue date Mar 29, 2016
- General Electric Company
- Paul Alan McConnelee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ultrathin buried die module and method of manufacturing thereof
- Patent number 9,236,348
- Issue date Jan 12, 2016
- General Electric Company
- Paul Alan McConnelee
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
System of chip package build-up
- Patent number 8,829,690
- Issue date Sep 9, 2014
- General Electric Company
- Paul Alan McConnelee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ultrathin buried die module and method of manufacturing thereof
- Patent number 8,658,473
- Issue date Feb 25, 2014
- General Electric Company
- Paul Alan McConnelee
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Electrical interconnect for an integrated circuit package and metho...
- Patent number 8,653,670
- Issue date Feb 18, 2014
- General Electric Company
- Paul Alan McConnelee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of chip package build-up
- Patent number 8,623,699
- Issue date Jan 7, 2014
- General Electric Company
- Paul Alan McConnelee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Protective coating with high adhesion and articles made therewith
- Patent number 8,586,172
- Issue date Nov 19, 2013
- General Electric Company
- Larry Steven Rosenzweig
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...

Patents Applicationslast 30 patents

Information Patent Application
ELECTRICAL INTERCONNECT FOR AN INTEGRATED CIRCUIT PACKAGE AND METHO...
- Publication number 20170278782
- Publication date Sep 28, 2017
- GENERAL ELECTRIC COMPANY
- Paul Alan McConnelee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRICAL INTERCONNECT FOR AN INTEGRATED CIRCUIT PACKAGE AND METHO...
- Publication number 20160211208
- Publication date Jul 21, 2016
- GENERAL ELECTRIC COMPANY
- Paul Alan McConnelee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC PACKAGES AND METHODS OF MAKING AND USING THE SAME
- Publication number 20160155693
- Publication date Jun 2, 2016
- GENERAL ELECTRIC COMPANY
- Scott Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRICAL INTERCONNECT FOR AN INTEGRATED CIRCUIT PACKAGE AND METHO...
- Publication number 20150171036
- Publication date Jun 18, 2015
- GENERAL ELECTRIC COMPANY
- Arun Virupaksha Gowda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ULTRATHIN BURIED DIE MODULE AND METHOD OF MANUFACTURING THEREOF
- Publication number 20140183750
- Publication date Jul 3, 2014
- GENERAL ELECTRIC COMPANY
- Paul Alan McConnelee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRICAL INTERCONNECT FOR AN INTEGRATED CIRCUIT PACKAGE AND METHO...
- Publication number 20140159213
- Publication date Jun 12, 2014
- GENERAL ELECTRIC COMPANY
- Paul Alan McConnelee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEM AND METHOD OF CHIP PACKAGE BUILD-UP
- Publication number 20140110866
- Publication date Apr 24, 2014
- GENERAL ELECTRIC COMPANY
- Paul Alan McConnelee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROTECTIVE COATING WITH HIGH ADHESION AND ARTICLES MADE THEREWITH
- Publication number 20140037903
- Publication date Feb 6, 2014
- GENERAL ELECTRIC COMPANY
- Larry Steven Rosenzweig
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
ULTRATHIN BURIED DIE MODULE AND METHOD OF MANUFACTURING THEREOF
- Publication number 20130256900
- Publication date Oct 3, 2013
- Paul Alan McConnelee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PHOTOVOLTAIC MODULE PACKAGE AND FABRICATION METHOD
- Publication number 20120222721
- Publication date Sep 6, 2012
- GENERAL ELECTRIC COMPANY
- Thomas Bert Gorczyca
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
SYSTEM AND METHOD OF CHIP PACKAGE BUILD-UP
- Publication number 20120018857
- Publication date Jan 26, 2012
- Paul Alan McConnelee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRICAL INTERCONNECT FOR AN INTEGRATED CIRCUIT PACKAGE AND METHO...
- Publication number 20110316167
- Publication date Dec 29, 2011
- Paul Alan McConnelee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROTECTIVE COATING WITH HIGH ADHESION AND ARTICLES MADE THEREWITH
- Publication number 20090280298
- Publication date Nov 12, 2009
- GENERAL ELECTRIC COMPANY
- Larry Steven Rosenzweig
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...

Scott Sheridan Smith

Person

Patents Grantslast 30 patents

Electrical interconnect for an integrated circuit package and metho...

Electrical interconnect for an integrated circuit package and metho...

Electronic packages and methods of making and using the same

Electrical interconnect for an integrated circuit package and metho...

Electrical interconnect for an integrated circuit package and metho...

Ultrathin buried die module and method of manufacturing thereof

System of chip package build-up

Ultrathin buried die module and method of manufacturing thereof

Electrical interconnect for an integrated circuit package and metho...

Method of chip package build-up

Protective coating with high adhesion and articles made therewith

Patents Applicationslast 30 patents

ELECTRICAL INTERCONNECT FOR AN INTEGRATED CIRCUIT PACKAGE AND METHO...

ELECTRICAL INTERCONNECT FOR AN INTEGRATED CIRCUIT PACKAGE AND METHO...

ELECTRONIC PACKAGES AND METHODS OF MAKING AND USING THE SAME

ELECTRICAL INTERCONNECT FOR AN INTEGRATED CIRCUIT PACKAGE AND METHO...

ULTRATHIN BURIED DIE MODULE AND METHOD OF MANUFACTURING THEREOF

ELECTRICAL INTERCONNECT FOR AN INTEGRATED CIRCUIT PACKAGE AND METHO...

SYSTEM AND METHOD OF CHIP PACKAGE BUILD-UP

PROTECTIVE COATING WITH HIGH ADHESION AND ARTICLES MADE THEREWITH

ULTRATHIN BURIED DIE MODULE AND METHOD OF MANUFACTURING THEREOF

PHOTOVOLTAIC MODULE PACKAGE AND FABRICATION METHOD

SYSTEM AND METHOD OF CHIP PACKAGE BUILD-UP

ELECTRICAL INTERCONNECT FOR AN INTEGRATED CIRCUIT PACKAGE AND METHO...

PROTECTIVE COATING WITH HIGH ADHESION AND ARTICLES MADE THEREWITH